The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to
control the power and frequency of the GPU.
It lets us omit the OPP tables from the device tree, as those can now be
enumerated at runtime from the MCU. It also means the mali GPU node
described in this binding does not have any clocks in this case, as all
clock control is delegated to the MCU.
Add the mediatek,mt8196-mali compatible, and a performance-domains
property which points to the MCU's device tree node in this case. It's
required on mt8196 devices.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
.../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
index 7ad5a3ffc5f5c753322eda9e74cc65de89d11c73..ccab2dd0ea852187e3ab75923e19739622b2b3b8 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@@ -38,7 +38,6 @@ properties:
- const: gpu
clocks:
- minItems: 1
maxItems: 3
clock-names:
@@ -54,6 +53,9 @@ properties:
opp-table:
type: object
+ performance-domains:
+ maxItems: 1
+
power-domains:
minItems: 1
maxItems: 5
@@ -92,7 +94,6 @@ required:
- interrupts
- interrupt-names
- clocks
- - mali-supply
additionalProperties: false
@@ -106,9 +107,26 @@ allOf:
properties:
clocks:
minItems: 3
+ performance-domains: false
power-domains:
maxItems: 1
power-domain-names: false
+ required:
+ - mali-supply
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: mediatek,mt8196-mali
+ then:
+ properties:
+ mali-supply: false
+ sram-supply: false
+ operating-points-v2: false
+ clocks: false
+ clock-names: false
+ required:
+ - performance-domains
examples:
- |
@@ -144,5 +162,15 @@ examples:
};
};
};
+ - |
+ gpu@48000000 {
+ compatible = "mediatek,mt8196-mali", "arm,mali-valhall-csf";
+ reg = <0x48000000 0x480000>;
+ interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "job", "mmu", "gpu";
+ performance-domains = <&gpufreq>;
+ };
...
--
2.51.0On Wed, Sep 17, 2025 at 02:22:32PM +0200, Nicolas Frattaroli wrote: > The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to > control the power and frequency of the GPU. > > It lets us omit the OPP tables from the device tree, as those can now be > enumerated at runtime from the MCU. It also means the mali GPU node > described in this binding does not have any clocks in this case, as all > clock control is delegated to the MCU. > > Add the mediatek,mt8196-mali compatible, and a performance-domains > property which points to the MCU's device tree node in this case. It's > required on mt8196 devices. > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> > --- > .../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++-- > 1 file changed, 30 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > index 7ad5a3ffc5f5c753322eda9e74cc65de89d11c73..ccab2dd0ea852187e3ab75923e19739622b2b3b8 100644 > --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > @@ -38,7 +38,6 @@ properties: > - const: gpu > > clocks: > - minItems: 1 I don't understand why. Best regards, Krzysztof
On Thursday, 18 September 2025 02:30:09 Central European Summer Time Krzysztof Kozlowski wrote: > On Wed, Sep 17, 2025 at 02:22:32PM +0200, Nicolas Frattaroli wrote: > > The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to > > control the power and frequency of the GPU. > > > > It lets us omit the OPP tables from the device tree, as those can now be > > enumerated at runtime from the MCU. It also means the mali GPU node > > described in this binding does not have any clocks in this case, as all > > clock control is delegated to the MCU. > > > > Add the mediatek,mt8196-mali compatible, and a performance-domains > > property which points to the MCU's device tree node in this case. It's > > required on mt8196 devices. > > > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> > > --- > > .../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++-- > > 1 file changed, 30 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > index 7ad5a3ffc5f5c753322eda9e74cc65de89d11c73..ccab2dd0ea852187e3ab75923e19739622b2b3b8 100644 > > --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > @@ -38,7 +38,6 @@ properties: > > - const: gpu > > > > clocks: > > - minItems: 1 > > I don't understand why. > > Best regards, > Krzysztof > > I am executing a Convex hull algorithm on the 3D space of "dt-bindings maintainer opinions" to get a convex hull of acceptable dt-bindings choices where two different choices are functionally equivalent. With this additional opinion on the krzk axis, I now know that having the base properties accurate for the general case is not required if the per-compatible case sets the property to false anyway. I hope no two opinions are collinear, as this would surely be my undoing. You get to pick which axis (X, Y, Z) you are. Right-hand rule, of course. Kind regards, Nicolas Frattaroli
On 18/09/2025 23:01, Nicolas Frattaroli wrote: > On Thursday, 18 September 2025 02:30:09 Central European Summer Time Krzysztof Kozlowski wrote: >> On Wed, Sep 17, 2025 at 02:22:32PM +0200, Nicolas Frattaroli wrote: >>> The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to >>> control the power and frequency of the GPU. >>> >>> It lets us omit the OPP tables from the device tree, as those can now be >>> enumerated at runtime from the MCU. It also means the mali GPU node >>> described in this binding does not have any clocks in this case, as all >>> clock control is delegated to the MCU. >>> >>> Add the mediatek,mt8196-mali compatible, and a performance-domains >>> property which points to the MCU's device tree node in this case. It's >>> required on mt8196 devices. >>> >>> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> >>> --- >>> .../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++-- >>> 1 file changed, 30 insertions(+), 2 deletions(-) >>> >>> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml >>> index 7ad5a3ffc5f5c753322eda9e74cc65de89d11c73..ccab2dd0ea852187e3ab75923e19739622b2b3b8 100644 >>> --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml >>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml >>> @@ -38,7 +38,6 @@ properties: >>> - const: gpu >>> >>> clocks: >>> - minItems: 1 >> >> I don't understand why. >> >> Best regards, >> Krzysztof >> >> > > I am executing a Convex hull algorithm on the 3D space of "dt-bindings > maintainer opinions" to get a convex hull of acceptable dt-bindings > choices where two different choices are functionally equivalent. > > With this additional opinion on the krzk axis, I now know that having > the base properties accurate for the general case is not required if > the per-compatible case sets the property to false anyway. > > I hope no two opinions are collinear, as this would surely be my > undoing. > > You get to pick which axis (X, Y, Z) you are. Right-hand rule, of > course. This piece of code is wrong and I could not deduce the reason. That's why I asked why you need that change. If you intend to waste my time, I will don't bother with this, but code is still wrong. Best regards, Krzysztof
On Friday, 19 September 2025 06:28:54 Central European Summer Time Krzysztof Kozlowski wrote: > On 18/09/2025 23:01, Nicolas Frattaroli wrote: > > On Thursday, 18 September 2025 02:30:09 Central European Summer Time Krzysztof Kozlowski wrote: > >> On Wed, Sep 17, 2025 at 02:22:32PM +0200, Nicolas Frattaroli wrote: > >>> The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to > >>> control the power and frequency of the GPU. > >>> > >>> It lets us omit the OPP tables from the device tree, as those can now be > >>> enumerated at runtime from the MCU. It also means the mali GPU node > >>> described in this binding does not have any clocks in this case, as all > >>> clock control is delegated to the MCU. > >>> > >>> Add the mediatek,mt8196-mali compatible, and a performance-domains > >>> property which points to the MCU's device tree node in this case. It's > >>> required on mt8196 devices. > >>> > >>> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> > >>> --- > >>> .../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++-- > >>> 1 file changed, 30 insertions(+), 2 deletions(-) > >>> > >>> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > >>> index 7ad5a3ffc5f5c753322eda9e74cc65de89d11c73..ccab2dd0ea852187e3ab75923e19739622b2b3b8 100644 > >>> --- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > >>> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > >>> @@ -38,7 +38,6 @@ properties: > >>> - const: gpu > >>> > >>> clocks: > >>> - minItems: 1 > >> > >> I don't understand why. > >> > >> Best regards, > >> Krzysztof > >> > >> > > > > I am executing a Convex hull algorithm on the 3D space of "dt-bindings > > maintainer opinions" to get a convex hull of acceptable dt-bindings > > choices where two different choices are functionally equivalent. > > > > With this additional opinion on the krzk axis, I now know that having > > the base properties accurate for the general case is not required if > > the per-compatible case sets the property to false anyway. > > > > I hope no two opinions are collinear, as this would surely be my > > undoing. > > > > You get to pick which axis (X, Y, Z) you are. Right-hand rule, of > > course. > > > This piece of code is wrong and I could not deduce the reason. That's > why I asked why you need that change. If you intend to waste my time, I > will don't bother with this, but code is still wrong. > > Best regards, > Krzysztof > The previous reply was in jest, I did not know that this was incorrect. That's because it has no effect; there is no option for a bare `arm,mali-valhall-csf` compatible with no other compatible preceding it right now as far as I can parse the binding (which in of itself seems wrong.) So minItems: 1 didn't do anything, because the RK3588 compatible would override it anyway, and the mt8196 compatible would disable the property entirely. Hence, this piece of code is not wrong, as it's functionally equivalent to what was already there. Unless that is my reasoning is erroneous, in which case I'd appreciate an explanation for how it is wrong, rather than having to argue why I think you think wrongly that it is wrong. Kind regards, Nicolas Frattaroli
On Wed, 17 Sep 2025 14:22:32 +0200, Nicolas Frattaroli wrote: > The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to > control the power and frequency of the GPU. > > It lets us omit the OPP tables from the device tree, as those can now be > enumerated at runtime from the MCU. It also means the mali GPU node > described in this binding does not have any clocks in this case, as all > clock control is delegated to the MCU. > > Add the mediatek,mt8196-mali compatible, and a performance-domains > property which points to the MCU's device tree node in this case. It's > required on mt8196 devices. > > Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> > --- > .../bindings/gpu/arm,mali-valhall-csf.yaml | 32 ++++++++++++++++++++-- > 1 file changed, 30 insertions(+), 2 deletions(-) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.example.dtb: gpu@48000000 (mediatek,mt8196-mali): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250917-mt8196-gpufreq-v3-1-c4ede4b4399e@collabora.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
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