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[RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs

Judith Mendez posted 1 patch 4 months, 3 weeks ago
There is a newer version of this series
.../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
1 file changed, 36 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
[RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs
Posted by Judith Mendez 4 months, 3 weeks ago 
On K3 SoCs there are efuse registers scattered across the memory
map. In order to reference these efuse registers like gp-sw which
may store SW REV information or other general purpose information
for drivers to consume, treat them appropriately as efuse devices
with nvmem framework.

Signed-off-by: Judith Mendez <jm@ti.com>
---
This patch is not complete and is sent as an RFC to get some initial
thoughts on this implementation to solve [0].

[0] https://lore.kernel.org/linux-mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org
---
 .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
 1 file changed, 36 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/ti,efuses.yaml

diff --git a/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
new file mode 100644
index 0000000000000..fffca65cdbfe0
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
@@ -0,0 +1,36 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/ti,efuses.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI SoC eFuse-based NVMEM
+
+maintainers:
+  - Judith Mendez <jm@ti.com>
+
+allOf:
+  - $ref: nvmem.yaml#
+  - $ref: nvmem-deprecated-cells.yaml#
+
+properties:
+  compatible:
+    - const: ti,am62p-efuse
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    efuse@43000230 {
+        compatible = "ti,am62p-efuse";
+        reg = <0x43000230 0x4>;
+    };
+
+...
-- 
2.51.0
Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs
Posted by Judith Mendez 4 months, 3 weeks ago 
Hi Krzysztof,

On 9/16/25 10:48 AM, Judith Mendez wrote:
> On K3 SoCs there are efuse registers scattered across the memory
> map. In order to reference these efuse registers like gp-sw which
> may store SW REV information or other general purpose information
> for drivers to consume, treat them appropriately as efuse devices
> with nvmem framework.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
> This patch is not complete and is sent as an RFC to get some initial
> thoughts on this implementation to solve [0].
> 
> [0] https://lore.kernel.org/linux-mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org
> ---
>   .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
>   1 file changed, 36 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> new file mode 100644
> index 0000000000000..fffca65cdbfe0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> @@ -0,0 +1,36 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/ti,efuses.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI SoC eFuse-based NVMEM
> +
> +maintainers:
> +  - Judith Mendez <jm@ti.com>
> +
> +allOf:
> +  - $ref: nvmem.yaml#
> +  - $ref: nvmem-deprecated-cells.yaml#
> +
> +properties:
> +  compatible:
> +    - const: ti,am62p-efuse
> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    efuse@43000230 {
> +        compatible = "ti,am62p-efuse";
> +        reg = <0x43000230 0x4>;
> +    };
> +
> +...

Ignoring the errors for now, do you think this could be a good solution
to solve [0]?

[0] 
https://lore.kernel.org/linux-mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org


regards,

~ Judith
Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs
Posted by Rob Herring (Arm) 4 months, 3 weeks ago 
On Tue, 16 Sep 2025 10:48:09 -0500, Judith Mendez wrote:
> On K3 SoCs there are efuse registers scattered across the memory
> map. In order to reference these efuse registers like gp-sw which
> may store SW REV information or other general purpose information
> for drivers to consume, treat them appropriately as efuse devices
> with nvmem framework.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
> This patch is not complete and is sent as an RFC to get some initial
> thoughts on this implementation to solve [0].
> 
> [0] https://lore.kernel.org/linux-mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org
> ---
>  .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
>  1 file changed, 36 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> 

My bot found errors running 'make dt_binding_check' on your patch:

yamllint warnings/errors:

dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml: ignoring, error in schema: properties: compatible
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml: properties:compatible: [{'const': 'ti,am62p-efuse'}] is not of type 'object', 'boolean'
	from schema $id: http://json-schema.org/draft-07/schema#
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml: properties:compatible: [{'const': 'ti,am62p-efuse'}] is not of type 'object', 'boolean'
	from schema $id: http://devicetree.org/meta-schemas/keywords.yaml#
Documentation/devicetree/bindings/nvmem/ti,efuses.example.dtb: /example-0/efuse@43000230: failed to match any schema with compatible: ['ti,am62p-efuse']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250916154809.545283-1-jm@ti.com

The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs
Posted by Andrew Davis 4 months, 3 weeks ago 
On 9/16/25 10:48 AM, Judith Mendez wrote:
> On K3 SoCs there are efuse registers scattered across the memory
> map. In order to reference these efuse registers like gp-sw which
> may store SW REV information or other general purpose information
> for drivers to consume, treat them appropriately as efuse devices
> with nvmem framework.
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
> This patch is not complete and is sent as an RFC to get some initial
> thoughts on this implementation to solve [0].
> 
> [0] https://lore.kernel.org/linux-mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org
> ---
>   .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
>   1 file changed, 36 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> 
> diff --git a/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> new file mode 100644
> index 0000000000000..fffca65cdbfe0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
> @@ -0,0 +1,36 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/nvmem/ti,efuses.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI SoC eFuse-based NVMEM
> +
> +maintainers:
> +  - Judith Mendez <jm@ti.com>
> +
> +allOf:
> +  - $ref: nvmem.yaml#
> +  - $ref: nvmem-deprecated-cells.yaml#

As the name suggests, this old fix-layout is deprecated, you
should look at using the newer NVMEM layouts style for this node.

> +
> +properties:
> +  compatible:
> +    - const: ti,am62p-efuse

You mention in the commit message, there are a couple efuse regions
in the AM62P SoC, so does this apply generally to all of them, or
should you have this be specific to the "gp-sw" efuse region you
are describing here?

> +
> +  reg:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    efuse@43000230 {
> +        compatible = "ti,am62p-efuse";
> +        reg = <0x43000230 0x4>;

The efuse region at 0x43000230 is 96bits, so this should be 0xc not 0x4 size.

Andrew

> +    };
> +
> +...
Re: [RFC PATCH] dt-bindings: nvmem: Introduce nvmem efuse binding for TI K3 SoCs
Posted by Judith Mendez 4 months, 3 weeks ago 
Hi Andrew,

On 9/16/25 11:31 AM, Andrew Davis wrote:
> On 9/16/25 10:48 AM, Judith Mendez wrote:
>> On K3 SoCs there are efuse registers scattered across the memory
>> map. In order to reference these efuse registers like gp-sw which
>> may store SW REV information or other general purpose information
>> for drivers to consume, treat them appropriately as efuse devices
>> with nvmem framework.
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>> This patch is not complete and is sent as an RFC to get some initial
>> thoughts on this implementation to solve [0].
>>
>> [0] https://lore.kernel.org/linux- 
>> mmc/736f09e0-075a-48e0-9b32-6b8805a7ee2a@kernel.org
>> ---
>>   .../devicetree/bindings/nvmem/ti,efuses.yaml  | 36 +++++++++++++++++++
>>   1 file changed, 36 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/nvmem/ 
>> ti,efuses.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml b/ 
>> Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
>> new file mode 100644
>> index 0000000000000..fffca65cdbfe0
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/nvmem/ti,efuses.yaml
>> @@ -0,0 +1,36 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/nvmem/ti,efuses.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: TI SoC eFuse-based NVMEM
>> +
>> +maintainers:
>> +  - Judith Mendez <jm@ti.com>
>> +
>> +allOf:
>> +  - $ref: nvmem.yaml#
>> +  - $ref: nvmem-deprecated-cells.yaml#
> 
> As the name suggests, this old fix-layout is deprecated, you
> should look at using the newer NVMEM layouts style for this node.

Fair point, this can be fixed.

> 
>> +
>> +properties:
>> +  compatible:
>> +    - const: ti,am62p-efuse
> 
> You mention in the commit message, there are a couple efuse regions
> in the AM62P SoC, so does this apply generally to all of them, or
> should you have this be specific to the "gp-sw" efuse region you
> are describing here?

I think it is better if this can be more generic, so not only should
it apply to gp-sw, gp-sw is only one example register we could treat
as efuse register.

> 
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    efuse@43000230 {
>> +        compatible = "ti,am62p-efuse";
>> +        reg = <0x43000230 0x4>;
> 
> The efuse region at 0x43000230 is 96bits, so this should be 0xc not 0x4 
> size.

oop, this will be fixed, thanks.

~ Judith

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