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[PATCH v2 8/9] arm64: dts: lx2160a-rdb: fully describe the two SFP+ cages

Ioana Ciornei posted 9 patches 2 weeks, 3 days ago
There is a newer version of this series
[PATCH v2 8/9] arm64: dts: lx2160a-rdb: fully describe the two SFP+ cages
Posted by Ioana Ciornei 2 weeks, 3 days ago 
Describe the two SFP+ cages found on the LX2160ARDB board with their
respective I2C buses and GPIO lines.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
Changes in v2:
- none

 .../boot/dts/freescale/fsl-lx2160a-rdb.dts    | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 4ede1295f29d..62329a93a67a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -31,6 +31,28 @@ sb_3v3: regulator-sb3v3 {
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	sfp2: sfp-2 {
+		compatible = "sff,sfp";
+		i2c-bus = <&sfp2_i2c>;
+		maximum-power-milliwatt = <2000>;
+		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
+		/* tx-disable-gpios = <&sfp2_csr 0 GPIO_ACTIVE_HIGH>; */
+		los-gpios = <&sfp2_csr 4 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpios = <&sfp2_csr 5 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpios = <&sfp2_csr 7 GPIO_ACTIVE_LOW>;
+	};
+
+	sfp3: sfp-3 {
+		compatible = "sff,sfp";
+		i2c-bus = <&sfp3_i2c>;
+		maximum-power-milliwatt = <2000>;
+		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
+		/* tx-disable-gpios = <&sfp3_csr 0 GPIO_ACTIVE_HIGH>; */
+		los-gpios = <&sfp3_csr 4 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpios = <&sfp3_csr 5 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpios = <&sfp3_csr 7 GPIO_ACTIVE_LOW>;
+	};
 };
 
 &crypto {
@@ -236,6 +258,31 @@ temperature-sensor@4d {
 				vcc-supply = <&sb_3v3>;
 			};
 		};
+
+		i2c@7 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x7>;
+
+			i2c-mux@75 {
+				compatible = "nxp,pca9547";
+				reg = <0x75>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				sfp2_i2c: i2c@4 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0x4>;
+				};
+
+				sfp3_i2c: i2c@5 {
+					#address-cells = <1>;
+					#size-cells = <0>;
+					reg = <0x5>;
+				};
+			};
+		};
 	};
 };
 
-- 
2.25.1
Re: [PATCH v2 8/9] arm64: dts: lx2160a-rdb: fully describe the two SFP+ cages
Posted by Frank Li 2 weeks, 1 day ago 
On Mon, Sep 15, 2025 at 03:23:53PM +0300, Ioana Ciornei wrote:
> Describe the two SFP+ cages found on the LX2160ARDB board with their
> respective I2C buses and GPIO lines.
>
> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> ---
> Changes in v2:
> - none
>
>  .../boot/dts/freescale/fsl-lx2160a-rdb.dts    | 47 +++++++++++++++++++
>  1 file changed, 47 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 4ede1295f29d..62329a93a67a 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -31,6 +31,28 @@ sb_3v3: regulator-sb3v3 {
>  		regulator-boot-on;
>  		regulator-always-on;
>  	};
> +
> +	sfp2: sfp-2 {
> +		compatible = "sff,sfp";
> +		i2c-bus = <&sfp2_i2c>;
> +		maximum-power-milliwatt = <2000>;
> +		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
> +		/* tx-disable-gpios = <&sfp2_csr 0 GPIO_ACTIVE_HIGH>; */
> +		los-gpios = <&sfp2_csr 4 GPIO_ACTIVE_HIGH>;
> +		tx-fault-gpios = <&sfp2_csr 5 GPIO_ACTIVE_HIGH>;
> +		mod-def0-gpios = <&sfp2_csr 7 GPIO_ACTIVE_LOW>;
> +	};
> +
> +	sfp3: sfp-3 {
> +		compatible = "sff,sfp";
> +		i2c-bus = <&sfp3_i2c>;
> +		maximum-power-milliwatt = <2000>;
> +		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
> +		/* tx-disable-gpios = <&sfp3_csr 0 GPIO_ACTIVE_HIGH>; */
> +		los-gpios = <&sfp3_csr 4 GPIO_ACTIVE_HIGH>;
> +		tx-fault-gpios = <&sfp3_csr 5 GPIO_ACTIVE_HIGH>;
> +		mod-def0-gpios = <&sfp3_csr 7 GPIO_ACTIVE_LOW>;
> +	};
>  };
>
>  &crypto {
> @@ -236,6 +258,31 @@ temperature-sensor@4d {
>  				vcc-supply = <&sb_3v3>;
>  			};
>  		};
> +
> +		i2c@7 {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0x7>;

reg should be first property.

> +
> +			i2c-mux@75 {
> +				compatible = "nxp,pca9547";
> +				reg = <0x75>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				sfp2_i2c: i2c@4 {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					reg = <0x4>;

the same here.

Frank
> +				};
> +
> +				sfp3_i2c: i2c@5 {
> +					#address-cells = <1>;
> +					#size-cells = <0>;
> +					reg = <0x5>;
> +				};
> +			};
> +		};
>  	};
>  };
>
> --
> 2.25.1
>
Re: [PATCH v2 8/9] arm64: dts: lx2160a-rdb: fully describe the two SFP+ cages
Posted by Ioana Ciornei 2 weeks, 1 day ago 
On Tue, Sep 16, 2025 at 12:46:26PM -0400, Frank Li wrote:
> On Mon, Sep 15, 2025 at 03:23:53PM +0300, Ioana Ciornei wrote:
> > Describe the two SFP+ cages found on the LX2160ARDB board with their
> > respective I2C buses and GPIO lines.
> >
> > Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
> > ---
> > Changes in v2:
> > - none
> >
> >  .../boot/dts/freescale/fsl-lx2160a-rdb.dts    | 47 +++++++++++++++++++
> >  1 file changed, 47 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > index 4ede1295f29d..62329a93a67a 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > @@ -31,6 +31,28 @@ sb_3v3: regulator-sb3v3 {
> >  		regulator-boot-on;
> >  		regulator-always-on;
> >  	};
> > +
> > +	sfp2: sfp-2 {
> > +		compatible = "sff,sfp";
> > +		i2c-bus = <&sfp2_i2c>;
> > +		maximum-power-milliwatt = <2000>;
> > +		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
> > +		/* tx-disable-gpios = <&sfp2_csr 0 GPIO_ACTIVE_HIGH>; */
> > +		los-gpios = <&sfp2_csr 4 GPIO_ACTIVE_HIGH>;
> > +		tx-fault-gpios = <&sfp2_csr 5 GPIO_ACTIVE_HIGH>;
> > +		mod-def0-gpios = <&sfp2_csr 7 GPIO_ACTIVE_LOW>;
> > +	};
> > +
> > +	sfp3: sfp-3 {
> > +		compatible = "sff,sfp";
> > +		i2c-bus = <&sfp3_i2c>;
> > +		maximum-power-milliwatt = <2000>;
> > +		/* Leave commented out if using DPMAC_LINK_TYPE_FIXED mode */
> > +		/* tx-disable-gpios = <&sfp3_csr 0 GPIO_ACTIVE_HIGH>; */
> > +		los-gpios = <&sfp3_csr 4 GPIO_ACTIVE_HIGH>;
> > +		tx-fault-gpios = <&sfp3_csr 5 GPIO_ACTIVE_HIGH>;
> > +		mod-def0-gpios = <&sfp3_csr 7 GPIO_ACTIVE_LOW>;
> > +	};
> >  };
> >
> >  &crypto {
> > @@ -236,6 +258,31 @@ temperature-sensor@4d {
> >  				vcc-supply = <&sb_3v3>;
> >  			};
> >  		};
> > +
> > +		i2c@7 {
> > +			#address-cells = <1>;
> > +			#size-cells = <0>;
> > +			reg = <0x7>;
> 
> reg should be first property.
> 

Ok. Will change all occurrences.

Ioana

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