System Memory Management Unit(SysMMU) for dpuf also called iommu.
This sysmmu is version 9.0.
DPUF has 3 dma blk, each channel is mapped to one iommu.
Signed-off-by: myunggeun.ji <myunggeun.ji@samsung.com>
---
.../arm64/boot/dts/exynos/exynosautov920.dtsi | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index 0fdf2062930a..ec3dc77b46bf 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -1494,6 +1494,27 @@ cmu_cpucl2: clock-controller@1ee00000 {
"switch",
"cluster";
};
+
+ sysmmu_dpuf0: sysmmu@18040000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x18040000 0x10000>;
+ interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_dpuf1: sysmmu@18440000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x18440000 0x10000>;
+ interrupts = <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ };
+
+ sysmmu_dpuf2: sysmmu@18840000 {
+ compatible = "samsung,exynos-sysmmu";
+ reg = <0x18840000 0x10000>;
+ interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <0>;
+ };
};
timer {
--
2.50.1