Add and enable UFS related nodes for this board.
Note that UFS Gear-4 Rate-B is unstable due to board and UFS module design
limitations. UFS on this board is stable when working at Gear-4 Rate-A.
Signed-off-by: Xilin Wu <sophon@radxa.com>
---
This change depends on the following patch series:
https://lore.kernel.org/all/20250902164900.21685-1-quic_rdwivedi@quicinc.com/
---
.../boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts | 29 ++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts
index d30cddfc3eff07237c7e3480a5d42b29091d87d6..3bf85d68c97891db1f1f0b84fb5649803948e06f 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts
@@ -482,6 +482,11 @@ &i2c13 {
status = "okay";
};
+/* It takes a long time in ufshcd_init_crypto when enabled */
+&ice {
+ status = "disabled";
+};
+
&lpass_audiocc {
compatible = "qcom,qcm6490-lpassaudiocc";
/delete-property/ power-domains;
@@ -938,6 +943,30 @@ &uart5 {
status = "okay";
};
+&ufs_mem_hc {
+ reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>;
+ vcc-supply = <&vreg_l7b_2p96>;
+ vcc-max-microamp = <800000>;
+ vccq-supply = <&vreg_l9b_1p2>;
+ vccq-max-microamp = <900000>;
+ vccq2-supply = <&vreg_l9b_1p2>;
+ vccq2-max-microamp = <1300000>;
+
+ /* Gear-4 Rate-B is unstable due to board */
+ /* and UFS module design limitations */
+ limit-rate = "rate-a";
+ /delete-property/ qcom,ice;
+
+ status = "okay";
+};
+
+&ufs_mem_phy {
+ vdda-phy-supply = <&vreg_l10c_0p88>;
+ vdda-pll-supply = <&vreg_l6b_1p2>;
+
+ status = "okay";
+};
+
&usb_2 {
dr_mode = "host";
--
2.51.0
On 9/14/25 5:57 PM, Xilin Wu wrote: > Add and enable UFS related nodes for this board. > > Note that UFS Gear-4 Rate-B is unstable due to board and UFS module design > limitations. UFS on this board is stable when working at Gear-4 Rate-A. > > Signed-off-by: Xilin Wu <sophon@radxa.com> > > --- > > This change depends on the following patch series: > https://lore.kernel.org/all/20250902164900.21685-1-quic_rdwivedi@quicinc.com/ > --- > .../boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts | 29 ++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts > index d30cddfc3eff07237c7e3480a5d42b29091d87d6..3bf85d68c97891db1f1f0b84fb5649803948e06f 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts > @@ -482,6 +482,11 @@ &i2c13 { > status = "okay"; > }; > > +/* It takes a long time in ufshcd_init_crypto when enabled */ Huh? It only turns on some clocks, writes a couple of mmio registers and turns the clocks back off, could you investigate a little more? > +&ice { > + status = "disabled"; > +}; > + > &lpass_audiocc { > compatible = "qcom,qcm6490-lpassaudiocc"; > /delete-property/ power-domains; > @@ -938,6 +943,30 @@ &uart5 { > status = "okay"; > }; > > +&ufs_mem_hc { > + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; > + vcc-supply = <&vreg_l7b_2p96>; > + vcc-max-microamp = <800000>; > + vccq-supply = <&vreg_l9b_1p2>; > + vccq-max-microamp = <900000>; > + vccq2-supply = <&vreg_l9b_1p2>; > + vccq2-max-microamp = <1300000>; > + > + /* Gear-4 Rate-B is unstable due to board */ > + /* and UFS module design limitations */ /* Gear-4 Rate-B is unstable due to board and UFS module design limitations */ Konrad
On 9/15/2025 3:24 PM, Konrad Dybcio wrote: > On 9/14/25 5:57 PM, Xilin Wu wrote: >> Add and enable UFS related nodes for this board. >> >> Note that UFS Gear-4 Rate-B is unstable due to board and UFS module design >> limitations. UFS on this board is stable when working at Gear-4 Rate-A. >> >> Signed-off-by: Xilin Wu <sophon@radxa.com> >> >> --- >> >> This change depends on the following patch series: >> https://lore.kernel.org/all/20250902164900.21685-1-quic_rdwivedi@quicinc.com/ >> --- >> .../boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts | 29 ++++++++++++++++++++++ >> 1 file changed, 29 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts >> index d30cddfc3eff07237c7e3480a5d42b29091d87d6..3bf85d68c97891db1f1f0b84fb5649803948e06f 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-radxa-dragon-q6a.dts >> @@ -482,6 +482,11 @@ &i2c13 { >> status = "okay"; >> }; >> >> +/* It takes a long time in ufshcd_init_crypto when enabled */ > > Huh? It only turns on some clocks, writes a couple of mmio registers > and turns the clocks back off, could you investigate a little more? More specifically, it takes a long time in `qcom_scm_ice_invalidate_key`. Considering this platform boots from SPI NOR, while TrustZone doesn't really support SPI NOR storage on this platform, there could be something broken in TZ. >> +&ice { >> + status = "disabled"; >> +}; >> + >> &lpass_audiocc { >> compatible = "qcom,qcm6490-lpassaudiocc"; >> /delete-property/ power-domains; >> @@ -938,6 +943,30 @@ &uart5 { >> status = "okay"; >> }; >> >> +&ufs_mem_hc { >> + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; >> + vcc-supply = <&vreg_l7b_2p96>; >> + vcc-max-microamp = <800000>; >> + vccq-supply = <&vreg_l9b_1p2>; >> + vccq-max-microamp = <900000>; >> + vccq2-supply = <&vreg_l9b_1p2>; >> + vccq2-max-microamp = <1300000>; >> + >> + /* Gear-4 Rate-B is unstable due to board */ >> + /* and UFS module design limitations */ > > /* Gear-4 Rate-B is unstable due to board and UFS module design limitations */ > > Konrad > -- Best regards, Xilin Wu <sophon@radxa.com>
On 14/09/2025 17:57, Xilin Wu wrote: > Add and enable UFS related nodes for this board. > > Note that UFS Gear-4 Rate-B is unstable due to board and UFS module design > limitations. UFS on this board is stable when working at Gear-4 Rate-A. > > Signed-off-by: Xilin Wu <sophon@radxa.com> > > --- > > This change depends on the following patch series: > https://lore.kernel.org/all/20250902164900.21685-1-quic_rdwivedi@quicinc.com/ Please don't add fake dependencies just to inflate the patchset. Best regards, Krzysztof
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