arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 2 ++ 1 file changed, 2 insertions(+)
From: Chen-Yu Tsai <wens@csie.org>
At least in the initial version of U-boot support landed upstream, the
PRCM bus clocks were not configured, and left at their reset default 24
MHz clock rate. This is quite slow for the peripherals on them.
The recommended rates from the manual are:
- AHBS: 200 MHz
- APBS0: 100 MHz
- APBS1: 24 MHz
Since 24 MHz is the hardware default, just assign rates for the first two.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index 3aad1b909501..5cd6ddae86c8 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -767,6 +767,8 @@ r_ccu: clock-controller@7010000 {
"pll-audio";
#clock-cells = <1>;
#reset-cells = <1>;
+ assigned-clocks = <&r_ccu CLK_R_AHB>, <&r_ccu CLK_R_APB0>;
+ assigned-clock-rates = <200000000>, <100000000>;
};
nmi_intc: interrupt-controller@7010320 {
--
2.39.5
On Sat, 13 Sep 2025 18:16:00 +0800, Chen-Yu Tsai wrote: > At least in the initial version of U-boot support landed upstream, the > PRCM bus clocks were not configured, and left at their reset default 24 > MHz clock rate. This is quite slow for the peripherals on them. > > The recommended rates from the manual are: > > - AHBS: 200 MHz > - APBS0: 100 MHz > - APBS1: 24 MHz > > [...] Applied to sunxi/dt-for-6.18 in local tree, thanks! [1/1] arm64: dts: sun55i: a523: Assign standard clock rates to PRCM bus clocks commit: e6fad4960fc67b7225255b10b080765b451a7bc7 Best regards, -- Chen-Yu Tsai <wens@csie.org>
Dne sobota, 13. september 2025 ob 12:16:00 Srednjeevropski poletni čas je Chen-Yu Tsai napisal(a): > From: Chen-Yu Tsai <wens@csie.org> > > At least in the initial version of U-boot support landed upstream, the > PRCM bus clocks were not configured, and left at their reset default 24 > MHz clock rate. This is quite slow for the peripherals on them. > > The recommended rates from the manual are: > > - AHBS: 200 MHz > - APBS0: 100 MHz > - APBS1: 24 MHz > > Since 24 MHz is the hardware default, just assign rates for the first two. I think it's better to be explicit than assume. However, this is fine too. Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- > arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > index 3aad1b909501..5cd6ddae86c8 100644 > --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi > @@ -767,6 +767,8 @@ r_ccu: clock-controller@7010000 { > "pll-audio"; > #clock-cells = <1>; > #reset-cells = <1>; > + assigned-clocks = <&r_ccu CLK_R_AHB>, <&r_ccu CLK_R_APB0>; > + assigned-clock-rates = <200000000>, <100000000>; > }; > > nmi_intc: interrupt-controller@7010320 { >
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