[PATCH] arm64: dts: ti: k3-j721s2-evm: Add overlay to enable USB0 Type-A

Siddharth Vadapalli posted 1 patch 2 weeks, 6 days ago
arch/arm64/boot/dts/ti/Makefile               |  4 +++
.../dts/ti/k3-j721s2-evm-usb0-type-a.dtso     | 28 +++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso
[PATCH] arm64: dts: ti: k3-j721s2-evm: Add overlay to enable USB0 Type-A
Posted by Siddharth Vadapalli 2 weeks, 6 days ago
The J721S2-EVM (J721S2-SOM mounted on the J7 Common Processor Board) has
a single instance of USB namely USB0. On the board, USB0 can be enabled
using a single USB interface at a time among the following:
1. USB3.1 Gen1 Type C interface
2. Two USB2.0 Type A interfaces via an on-board USB Hub

By default, USB0 is enabled using the USB3.1 Gen1 Type C interface. Hence,
add a device-tree overlay to allow using USB0 with the USB2.0 Type A
interfaces by configuring the "USB2.0_MUX_SEL" mux. Also, since the Type A
interfaces only connect to USB Devices with USB0 acting as the USB Host,
set the Dual-Role mode for USB0 to Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

Hello,

This patch is based on linux-next tagged next-20250911.
Patch has been validated on J721S2-EVM. Test logs have been provided
below for the default case without the DT overlay (Type C Interface)
and with the DT overlay applied (Type A Interface).

Without the DT overlay, USB0 is configured with 'dr_mode' set to "otg"
due to which the 'lsusb' output does not contain any output initially
as the USB Mass Storage device is not yet connected to the Type C
Interface on the EVM. After connecting the USB Mass Storage device to
the Type C Interface, USB0 assumes the Host role and enumerates the Mass
Storage device. Following this, 'lsusb' output shows the USB Root Hub
and the USB Mass Storage Device. Test Logs for this are:
https://gist.github.com/Siddharth-Vadapalli-at-TI/6bc1434b7d949a2f2c43d55811aee661

With the DT overlay applied, USB0 assumes the Host role by default, due
to which the 'lsusb' output contains the Root Hub even without the USB
Mass Storage device connected to the Type A Interface on the EVM. After
the USB Mass Storage device is connected to the Type A Interface, it is
enumerated and shows up in the 'lsusb' output. Test Logs for this are:
https://gist.github.com/Siddharth-Vadapalli-at-TI/dc3443be624b61d920833f1a66ab356a

Regards,
Siddharth.

 arch/arm64/boot/dts/ti/Makefile               |  4 +++
 .../dts/ti/k3-j721s2-evm-usb0-type-a.dtso     | 28 +++++++++++++++++++
 2 files changed, 32 insertions(+)
 create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso

diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index aad9177930e6..1e4829801e49 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -131,6 +131,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-gesi-exp-board.dtbo
 k3-j721s2-evm-dtbs := k3-j721s2-common-proc-board.dtb k3-j721s2-evm-gesi-exp-board.dtbo
 dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_K3) += k3-j721s2-evm-usb0-type-a.dtbo
 
 # Boards with J722s SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am67a-beagley-ai.dtb
@@ -230,6 +231,8 @@ k3-j721e-sk-csi2-dual-imx219-dtbs := k3-j721e-sk.dtb \
 	k3-j721e-sk-csi2-dual-imx219.dtbo
 k3-j721s2-evm-pcie1-ep-dtbs := k3-j721s2-common-proc-board.dtb \
 	k3-j721s2-evm-pcie1-ep.dtbo
+k3-j721s2-evm-usb0-type-a-dtbs := k3-j721s2-common-proc-board.dtb \
+	k3-j721s2-evm-usb0-type-a.dtbo
 k3-j722s-evm-csi2-quad-rpi-cam-imx219-dtbs := k3-j722s-evm.dtb \
 	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtbo
 k3-j722s-evm-csi2-quad-tevi-ov5640-dtbs := k3-j722s-evm.dtb \
@@ -272,6 +275,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \
 	k3-j721e-evm-pcie1-ep.dtb \
 	k3-j721e-sk-csi2-dual-imx219.dtb \
 	k3-j721s2-evm-pcie1-ep.dtb \
+	k3-j721s2-evm-usb0-type-a.dtb \
 	k3-j722s-evm-csi2-quad-rpi-cam-imx219.dtb \
 	k3-j722s-evm-csi2-quad-tevi-ov5640.dtb \
 	k3-j742s2-evm-usb0-type-a.dtb \
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso b/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso
new file mode 100644
index 000000000000..fe4a23efe708
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-evm-usb0-type-a.dtso
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * DT Overlay for enabling USB0 instance of USB in the Host Mode of operation
+ * with the Type-A Connector on the J7 common processor board.
+ *
+ * J7 Common Processor Board Product Link: https://www.ti.com/tool/J721EXCPXEVM
+ *
+ * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&exp_som {
+	p0-hog {
+		/* P0 - USB2.0_MUX_SEL */
+		gpio-hog;
+		gpios = <0 GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "USB2.0_MUX_SEL";
+	};
+};
+
+&usb0 {
+	dr_mode = "host";
+};
-- 
2.43.0
Re: [PATCH] arm64: dts: ti: k3-j721s2-evm: Add overlay to enable USB0 Type-A
Posted by Nishanth Menon 2 weeks, 6 days ago
Hi Siddharth Vadapalli,

On Fri, 12 Sep 2025 11:50:14 +0530, Siddharth Vadapalli wrote:
> The J721S2-EVM (J721S2-SOM mounted on the J7 Common Processor Board) has
> a single instance of USB namely USB0. On the board, USB0 can be enabled
> using a single USB interface at a time among the following:
> 1. USB3.1 Gen1 Type C interface
> 2. Two USB2.0 Type A interfaces via an on-board USB Hub
> 
> By default, USB0 is enabled using the USB3.1 Gen1 Type C interface. Hence,
> add a device-tree overlay to allow using USB0 with the USB2.0 Type A
> interfaces by configuring the "USB2.0_MUX_SEL" mux. Also, since the Type A
> interfaces only connect to USB Devices with USB0 acting as the USB Host,
> set the Dual-Role mode for USB0 to Host.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1]. might
good to see these earlier in the rc cycle, but looks innocous enough,
so applied. Thank you!

[1/1] arm64: dts: ti: k3-j721s2-evm: Add overlay to enable USB0 Type-A
      commit: fcfedcb6804caaf18f22016de16d93bf18bbcfdd

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
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