The Glymur platform implements the eDP/DP PHY version 8.
Add the necessary registers, rework the driver to accommodate
this new version and add the Glymur specific configuration data.
This patchset depends on:
https://lore.kernel.org/all/20250909-phy-qcom-edp-add-missing-refclk-v3-0-4ec55a0512ab@linaro.org/
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes in v3:
- Split the DP_AUX_CFG_SIZE change into as separate patch, as per
Konrad's request.
- Re-worded the dt-bindings commit, as per Krzysztof's request.
- Link to v2: https://lore.kernel.org/r/20250909-phy-qcom-edp-add-glymur-support-v2-0-02553381e47d@linaro.org
Changes in v2:
- Sorted alphabetically the both the compatible and v8 specific
configuration.
- Prefixed the new offsets with DP in order differentiate from PCIe ones
- Link to v1: https://lore.kernel.org/r/20250904-phy-qcom-edp-add-glymur-support-v1-0-e83c6b9a145b@linaro.org
---
Abel Vesa (4):
dt-bindings: phy: Add DP PHY compatible for Glymur
phy: qcom: edp: Fix the DP_PHY_AUX_CFG registers count
phy: qcom-qmp: qserdes-com: Add v8 DP-specific qserdes register offsets
phy: qcom: edp: Add Glymur platform support
.../devicetree/bindings/phy/qcom,edp-phy.yaml | 2 +
drivers/phy/qualcomm/phy-qcom-edp.c | 242 ++++++++++++++++++++-
.../phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h | 52 +++++
3 files changed, 289 insertions(+), 7 deletions(-)
---
base-commit: 8128ba77e80a40f545381f1b31267f2f204380fe
change-id: 20250903-phy-qcom-edp-add-glymur-support-2a8117d92b89
Best regards,
--
Abel Vesa <abel.vesa@linaro.org>