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[PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC

Harikrishna Shenoy posted 1 patch 3 weeks, 2 days ago 
.../bindings/display/bridge/cdns,mhdp8546.yaml | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
[PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Harikrishna Shenoy 3 weeks, 2 days ago 
From: Swapnil Jakhade <sjakhade@cadence.com>

Add binding changes for DSC(Display Stream Compression) in the MHDP8546
DPI/DP bridge.

Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
---
Changelog v3 -> v4:
-Remove maxItems as item list is mentioned for reg-names, resolves 
dt_bindings_check warning.
Log link- <https://gist.github.com/h-shenoy/5391ea514bb58a6cba3f39248d20916b>
Link to v3- https://lore.kernel.org/all/20250908054609.1113360-1-h-shenoy@ti.com/

 .../bindings/display/bridge/cdns,mhdp8546.yaml | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
index c2b369456e4e..b40630de6d89 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
@@ -27,6 +27,8 @@ properties:
           Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
       - description:
           Register block of mhdptx sapb registers.
+      - description:
+          Register block for mhdptx DSC encoder registers.
 
   reg-names:
     minItems: 1
@@ -34,6 +36,7 @@ properties:
       - const: mhdptx
       - const: j721e-intg
       - const: mhdptx-sapb
+      - const: dsc
 
   clocks:
     maxItems: 1
@@ -100,18 +103,25 @@ allOf:
       properties:
         reg:
           minItems: 2
-          maxItems: 3
+          maxItems: 4
         reg-names:
           minItems: 2
-          maxItems: 3
+          items:
+            - const: mhdptx
+            - const: j721e-intg
+            - const: mhdptx-sapb
+            - const: dsc
     else:
       properties:
         reg:
           minItems: 1
-          maxItems: 2
+          maxItems: 3
         reg-names:
           minItems: 1
-          maxItems: 2
+          items:
+            - const: mhdptx
+            - const: mhdptx-sapb
+            - const: dsc
 
 required:
   - compatible
-- 
2.34.1
Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Krzysztof Kozlowski 3 weeks, 1 day ago 
On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade <sjakhade@cadence.com>
> 
> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
> DPI/DP bridge.

Also, where is any user of this change (DSC)? Why are you adding changes
to the bindings which no one uses?

Best regards,
Krzysztof
Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Harikrishna Shenoy 3 weeks, 1 day ago 
On 9/10/25 13:29, Krzysztof Kozlowski wrote:
> On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
>> From: Swapnil Jakhade <sjakhade@cadence.com>
>>
>> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
>> DPI/DP bridge.
> Also, where is any user of this change (DSC)? Why are you adding changes
> to the bindings which no one uses?
>
> Best regards,
> Krzysztof
>
Cadence MHDP has DSC IP which can be enabled, DT will need to define DSC 
register space

for using the feature, was planning to  post DT and driver changes once 
bindings get accepted.

Warm Regards,

Hari
Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Krzysztof Kozlowski 3 weeks ago 
On 10/09/2025 10:12, Harikrishna Shenoy wrote:
> 
> On 9/10/25 13:29, Krzysztof Kozlowski wrote:
>> On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
>>> From: Swapnil Jakhade <sjakhade@cadence.com>
>>>
>>> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
>>> DPI/DP bridge.
>> Also, where is any user of this change (DSC)? Why are you adding changes
>> to the bindings which no one uses?
>>
>> Best regards,
>> Krzysztof
>>
> Cadence MHDP has DSC IP which can be enabled, DT will need to define DSC 
> register space
> 
> for using the feature, was planning to  post DT and driver changes once 
> bindings get accepted.

No, this is not how it works. Read the docs... recently TI dropped the
ball and you really send crappy patches.

You post always bindings and users, in this case with driver.

To be clear for this patch alone:

NAK


Best regards,
Krzysztof
Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Rob Herring 3 weeks, 1 day ago 
On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
> From: Swapnil Jakhade <sjakhade@cadence.com>
> 
> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
> DPI/DP bridge.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
> ---
> Changelog v3 -> v4:
> -Remove maxItems as item list is mentioned for reg-names, resolves 
> dt_bindings_check warning.
> Log link- <https://gist.github.com/h-shenoy/5391ea514bb58a6cba3f39248d20916b>
> Link to v3- https://lore.kernel.org/all/20250908054609.1113360-1-h-shenoy@ti.com/
> 
>  .../bindings/display/bridge/cdns,mhdp8546.yaml | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> index c2b369456e4e..b40630de6d89 100644
> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
> @@ -27,6 +27,8 @@ properties:
>            Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
>        - description:
>            Register block of mhdptx sapb registers.
> +      - description:
> +          Register block for mhdptx DSC encoder registers.
>  
>    reg-names:
>      minItems: 1
> @@ -34,6 +36,7 @@ properties:
>        - const: mhdptx
>        - const: j721e-intg
>        - const: mhdptx-sapb
> +      - const: dsc
>  
>    clocks:
>      maxItems: 1
> @@ -100,18 +103,25 @@ allOf:
>        properties:
>          reg:
>            minItems: 2
> -          maxItems: 3
> +          maxItems: 4
>          reg-names:
>            minItems: 2
> -          maxItems: 3
> +          items:
> +            - const: mhdptx
> +            - const: j721e-intg
> +            - const: mhdptx-sapb
> +            - const: dsc
>      else:
>        properties:
>          reg:
>            minItems: 1
> -          maxItems: 2
> +          maxItems: 3
>          reg-names:
>            minItems: 1
> -          maxItems: 2
> +          items:
> +            - const: mhdptx
> +            - const: mhdptx-sapb
> +            - const: dsc

Still obviously not tested with a DT having this. Because this 
contradicts the top-level schema. Both cannot be true.

Rob
Re: [PATCH v4] dt-bindings: drm/bridge: MHDP8546 bridge binding changes for DSC
Posted by Harikrishna Shenoy 3 weeks, 1 day ago 
On 9/10/25 08:06, Rob Herring wrote:
> On Tue, Sep 09, 2025 at 11:16:22AM +0530, Harikrishna Shenoy wrote:
>> From: Swapnil Jakhade <sjakhade@cadence.com>
>>
>> Add binding changes for DSC(Display Stream Compression) in the MHDP8546
>> DPI/DP bridge.
>>
>> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
>> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
>> ---
>> Changelog v3 -> v4:
>> -Remove maxItems as item list is mentioned for reg-names, resolves
>> dt_bindings_check warning.
>> Log link- <https://gist.github.com/h-shenoy/5391ea514bb58a6cba3f39248d20916b>
>> Link to v3- https://lore.kernel.org/all/20250908054609.1113360-1-h-shenoy@ti.com/
>>
>>   .../bindings/display/bridge/cdns,mhdp8546.yaml | 18 ++++++++++++++----
>>   1 file changed, 14 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> index c2b369456e4e..b40630de6d89 100644
>> --- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
>> @@ -27,6 +27,8 @@ properties:
>>             Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
>>         - description:
>>             Register block of mhdptx sapb registers.
>> +      - description:
>> +          Register block for mhdptx DSC encoder registers.
>>   
>>     reg-names:
>>       minItems: 1
>> @@ -34,6 +36,7 @@ properties:
>>         - const: mhdptx
>>         - const: j721e-intg
>>         - const: mhdptx-sapb
>> +      - const: dsc
>>   
>>     clocks:
>>       maxItems: 1
>> @@ -100,18 +103,25 @@ allOf:
>>         properties:
>>           reg:
>>             minItems: 2
>> -          maxItems: 3
>> +          maxItems: 4
>>           reg-names:
>>             minItems: 2
>> -          maxItems: 3
>> +          items:
>> +            - const: mhdptx
>> +            - const: j721e-intg
>> +            - const: mhdptx-sapb
>> +            - const: dsc
>>       else:
>>         properties:
>>           reg:
>>             minItems: 1
>> -          maxItems: 2
>> +          maxItems: 3
>>           reg-names:
>>             minItems: 1
>> -          maxItems: 2
>> +          items:
>> +            - const: mhdptx
>> +            - const: mhdptx-sapb
>> +            - const: dsc
> Still obviously not tested with a DT having this. Because this
> contradicts the top-level schema. Both cannot be true.
>
> Rob
Will update and test with the other compatible on some dummy dt and 
share logs

Patchew 2.1-devel-b67e4c2

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