With the introduction of the Icicle Kit using the production MPFS250T
device, it's necessary to distinguish it from the engineering sample
(-es) variant. Engineering samples cannot write to flash from the MSS,
as noted in the PolarFire SoC FPGA ES errata.

Add specific compatibles for the Icicle Kit with Production device
(MPFS250T) and Icicle Kit with Engineering Sample (MPFS250T_ES).

The icicle kit reference designs in the v2025.07 release include the
Mi-V IHC IP v2, used to send/receive data between clusters when
using Asymmetric Multiprocessing (AMP) mode.

In reference design releases prior to v2025.07, the MI-V IHC subsystem
was included as a proof of concept in the design prior to becoming an
IP available in the Libero catalog.

Among other improvements, the new Mi-V IHC IP v2 includes some
changes to the register map. For this reason, make use of a new
reference design compatible to denote that v2025.07 reference design
releases are not backwards compatible.

Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
---
 Documentation/devicetree/bindings/riscv/microchip.yaml | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml
index 78ce76ae1b6d..8ddc5c02973e 100644
--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml
@@ -18,10 +18,18 @@ properties:
     const: '/'
   compatible:
     oneOf:
+      - items:
+          - const: microchip,mpfs-icicle-prod-reference-rtl-v2507
+          - const: microchip,mpfs-icicle-kit-prod
+          - const: microchip,mpfs-icicle-kit
+          - const: microchip,mpfs-prod
+          - const: microchip,mpfs
+
       - items:
           - enum:
               - microchip,mpfs-icicle-reference-rtlv2203
               - microchip,mpfs-icicle-reference-rtlv2210
+              - microchip,mpfs-icicle-es-reference-rtl-v2507
           - const: microchip,mpfs-icicle-kit
           - const: microchip,mpfs
 
-- 
2.34.1

On Mon, Sep 08, 2025 at 12:57:28PM +0100, Valentina Fernandez wrote:
> With the introduction of the Icicle Kit using the production MPFS250T
> device, it's necessary to distinguish it from the engineering sample
> (-es) variant. Engineering samples cannot write to flash from the MSS,
> as noted in the PolarFire SoC FPGA ES errata.
> 
> Add specific compatibles for the Icicle Kit with Production device
> (MPFS250T) and Icicle Kit with Engineering Sample (MPFS250T_ES).
> 
> The icicle kit reference designs in the v2025.07 release include the
> Mi-V IHC IP v2, used to send/receive data between clusters when
> using Asymmetric Multiprocessing (AMP) mode.
> 
> In reference design releases prior to v2025.07, the MI-V IHC subsystem
> was included as a proof of concept in the design prior to becoming an
> IP available in the Libero catalog.
> 
> Among other improvements, the new Mi-V IHC IP v2 includes some
> changes to the register map. For this reason, make use of a new
> reference design compatible to denote that v2025.07 reference design
> releases are not backwards compatible.
> 
> Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
> ---
>  Documentation/devicetree/bindings/riscv/microchip.yaml | 8 ++++++++
>  1 file changed, 8 insertions(+)

Why are you sending patches which are already applied? For two weeks?

Best regards,
Krzysztof

On Tue, Sep 09, 2025 at 08:53:05AM +0200, Krzysztof Kozlowski wrote:
> On Mon, Sep 08, 2025 at 12:57:28PM +0100, Valentina Fernandez wrote:
> > With the introduction of the Icicle Kit using the production MPFS250T
> > device, it's necessary to distinguish it from the engineering sample
> > (-es) variant. Engineering samples cannot write to flash from the MSS,
> > as noted in the PolarFire SoC FPGA ES errata.
> > 
> > Add specific compatibles for the Icicle Kit with Production device
> > (MPFS250T) and Icicle Kit with Engineering Sample (MPFS250T_ES).
> > 
> > The icicle kit reference designs in the v2025.07 release include the
> > Mi-V IHC IP v2, used to send/receive data between clusters when
> > using Asymmetric Multiprocessing (AMP) mode.
> > 
> > In reference design releases prior to v2025.07, the MI-V IHC subsystem
> > was included as a proof of concept in the design prior to becoming an
> > IP available in the Libero catalog.
> > 
> > Among other improvements, the new Mi-V IHC IP v2 includes some
> > changes to the register map. For this reason, make use of a new
> > reference design compatible to denote that v2025.07 reference design
> > releases are not backwards compatible.
> > 
> > Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com>
> > ---
> >  Documentation/devicetree/bindings/riscv/microchip.yaml | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> 
> Why are you sending patches which are already applied? For two weeks?

That's probably my bad, I dropped the series when you had complaints
about the version that I applied and forgot to mention it.