[PATCH v2 RESEND 0/3] irqchip/gic-v5: Holdover fixes

Lorenzo Pieralisi posted 3 patches 3 weeks, 3 days ago
drivers/irqchip/irq-gic-v5-irs.c |  2 +-
drivers/irqchip/irq-gic-v5-its.c | 24 ++++++++++++++++--------
2 files changed, 17 insertions(+), 9 deletions(-)
[PATCH v2 RESEND 0/3] irqchip/gic-v5: Holdover fixes
Posted by Lorenzo Pieralisi 3 weeks, 3 days ago
Hi Thomas,

I am just resending fixes posted by Dan in [1] before the v6.17 merge window
started and GICv5 code was queued for -next to make sure they did not
get lost in the process.

I tested them by forcing the relevant error paths to happen (patches (2)-(3),
for patch (1) there is nothing to test).

Please apply them whenever you deem that suitable, thank you.

[1] https://lore.kernel.org/lkml/670bb1dc-7827-4916-84f3-bb46ee408b20@sabinyo.mountain/

Cc: Dan Carpenter <dan.carpenter@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Zenghui Yu <yuzenghui@huawei.com>
Cc: Marc Zyngier <maz@kernel.org>

Dan Carpenter (3):
  irqchip/gic-v5: Delete a stray tab
  irqchip/gic-v5: Fix loop in gicv5_its_create_itt_two_level() cleanup
    path
  irqchip/gic-v5: Fix error handling in gicv5_its_irq_domain_alloc()

 drivers/irqchip/irq-gic-v5-irs.c |  2 +-
 drivers/irqchip/irq-gic-v5-its.c | 24 ++++++++++++++++--------
 2 files changed, 17 insertions(+), 9 deletions(-)

-- 
2.48.0