sama7d65 has 2 instances of the QSPI controller:

• One Octal Serial Peripheral Interface (QSPI0) supporting DDR. Octal,
Twin-Quad, HyperFlashTM and OctaFlashTM protocols supported.

• One Quad Serial Peripheral Interface (QSPI1) supporting DDR/SDR.

Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
---
 Documentation/devicetree/bindings/spi/atmel,quadspi.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
index c17114123034..30ab42c95c08 100644
--- a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
+++ b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml
@@ -18,6 +18,8 @@ properties:
       - atmel,sama5d2-qspi
       - microchip,sam9x60-qspi
       - microchip,sam9x7-ospi
+      - microchip,sama7d65-qspi
+      - microchip,sama7d65-ospi
       - microchip,sama7g5-qspi
       - microchip,sama7g5-ospi
 

-- 
2.43.0

On Mon, 08 Sep 2025 09:44:17 +0530, Dharma Balasubiramani wrote:
> sama7d65 has 2 instances of the QSPI controller:
> 
> • One Octal Serial Peripheral Interface (QSPI0) supporting DDR. Octal,
> Twin-Quad, HyperFlashTM and OctaFlashTM protocols supported.
> 
> • One Quad Serial Peripheral Interface (QSPI1) supporting DDR/SDR.
> 
> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
> ---
>  Documentation/devicetree/bindings/spi/atmel,quadspi.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>