Add UART serial nodes for the PERIC0 and PERIC1 blocks.
Signed-off-by: Denzeel Oliva <wachiturroxd150@gmail.com>
---
arch/arm64/boot/dts/exynos/exynos990.dtsi | 323 ++++++++++++++++++++++++++++++
1 file changed, 323 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index 1e09f3efe685748789ffd346cd914f9a8ba68f8b..de9cf9b2d1b28a62519d95549d04458c6e4fe16d 100644
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/clock/samsung,exynos990.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/samsung,exynos-usi.h>
/ {
compatible = "samsung,exynos990";
@@ -272,6 +273,34 @@ pinctrl_peric0: pinctrl@10430000 {
interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
};
+ usi_uart: usi@105400c0 {
+ compatible = "samsung,exynos990-usi", "samsung,exynos850-usi";
+ reg = <0x105400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric0 0x1000>;
+ samsung,mode = <USI_MODE_UART>;
+ status = "disabled";
+
+ serial_0: serial@10540000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10540000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_4>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart0_bus>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
+ };
+
usi0: usi@105500c0 {
compatible = "samsung,exynos990-usi", "samsung,exynos850-usi";
reg = <0x105500c0 0x20>;
@@ -283,6 +312,20 @@ usi0: usi@105500c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1004>;
status = "disabled";
+
+ serial_2: serial@10550000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10550000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart2_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi1: usi@105700c0 {
@@ -296,6 +339,20 @@ usi1: usi@105700c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x100c>;
status = "disabled";
+
+ serial_3: serial@10570000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10570000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_7>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart3_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi2: usi@105900c0 {
@@ -309,6 +366,20 @@ usi2: usi@105900c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1014>;
status = "disabled";
+
+ serial_4: serial@10590000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10590000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_9>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_9>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart4_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi3: usi@105b00c0 {
@@ -322,6 +393,20 @@ usi3: usi@105b00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x101c>;
status = "disabled";
+
+ serial_5: serial@105b0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x105b0000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_11>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_11>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart5_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi4: usi@105d00c0 {
@@ -335,6 +420,20 @@ usi4: usi@105d00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1024>;
status = "disabled";
+
+ serial_6: serial@105d0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x105d0000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_13>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_13>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart6_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi5: usi@105f00c0 {
@@ -348,6 +447,20 @@ usi5: usi@105f00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x102c>;
status = "disabled";
+
+ serial_7: serial@105f0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x105f0000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_PCLK_15>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP0_IPCLK_15>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart7_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi13: usi@106300c0 {
@@ -361,6 +474,20 @@ usi13: usi@106300c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x103c>;
status = "disabled";
+
+ serial_15: serial@10630000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10630000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_3>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_3>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart15_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi14: usi@106500c0 {
@@ -374,6 +501,20 @@ usi14: usi@106500c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1044>;
status = "disabled";
+
+ serial_16: serial@10650000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10650000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_5>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_5>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart16_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled"
+ };
};
usi15: usi@106700c0 {
@@ -387,6 +528,20 @@ usi15: usi@106700c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x104c>;
status = "disabled";
+
+ serial_17: serial@10670000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10670000 0xc0>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_PCLK_7>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_TOP1_IPCLK_7>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart17_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
cmu_peric1: clock-controller@10700000 {
@@ -412,6 +567,34 @@ pinctrl_peric1: pinctrl@10730000 {
interrupts = <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>;
};
+ usi_bt_uart: usi@108400c0 {
+ compatible = "samsung,exynos990-usi", "samsung,exynos850-usi";
+ reg = <0x108400c0 0x20>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "pclk", "ipclk";
+ samsung,sysreg = <&sysreg_peric1 0x1000>;
+ samsung,mode = <USI_MODE_UART>;
+ status = "disabled";
+
+ serial_1: serial@10840000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10840000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart1_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
+ };
+
usi6: usi@108a00c0 {
compatible = "samsung,exynos990-usi", "samsung,exynos850-usi";
reg = <0x108a00c0 0x20>;
@@ -423,6 +606,20 @@ usi6: usi@108a00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1018>;
status = "disabled";
+
+ serial_8: serial@108a0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x108a0000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_10>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_10>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart8_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi7: usi@108c00c0 {
@@ -436,6 +633,20 @@ usi7: usi@108c00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1020>;
status = "disabled";
+
+ serial_9: serial@108c0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x108c0000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_12>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_12>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart9_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi8: usi@108e00c0 {
@@ -449,6 +660,20 @@ usi8: usi@108e00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1028>;
status = "disabled";
+
+ serial_10: serial@108e0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x108e0000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_PCLK_14>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP0_IPCLK_14>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart10_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
};
usi9: usi@109000c0 {
@@ -462,6 +687,20 @@ usi9: usi@109000c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1030>;
status = "disabled";
+
+ serial_11: serial@10900000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10900000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_0>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_0>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart11_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
};
usi10: usi@109200c0 {
@@ -475,6 +714,20 @@ usi10: usi@109200c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1038>;
status = "disabled";
+
+ serial_12: serial@10920000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10920000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_2>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_2>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart12_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
};
usi11: usi@109400c0 {
@@ -488,6 +741,20 @@ usi11: usi@109400c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1040>;
status = "disabled";
+
+ serial_13: serial@10940000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10940000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_4>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_4>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart13_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi12: usi@109c00c0 {
@@ -501,6 +768,20 @@ usi12: usi@109c00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x2000>;
status = "disabled";
+
+ serial_14: serial@109c0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x109c0000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_12>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_12>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart14_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi16: usi@109600c0 {
@@ -514,6 +795,20 @@ usi16: usi@109600c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1048>;
status = "disabled";
+
+ serial_18: serial@10960000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10960000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_6>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_6>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart18_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi17: usi@109900c0 {
@@ -527,6 +822,20 @@ usi17: usi@109900c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x1050>;
status = "disabled";
+
+ serial_19: serial@10990000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x10990000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_9>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_9>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart19_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
usi18: usi@109e00c0 {
@@ -540,6 +849,20 @@ usi18: usi@109e00c0 {
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric1 0x2008>;
status = "disabled";
+
+ serial_20: serial@109e0000 {
+ compatible = "samsung,exynos990-uart",
+ "samsung,exynos8895-uart";
+ reg = <0x109e0000 0xc0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_PCLK_14>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_TOP1_IPCLK_14>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&uart20_bus_single>;
+ pinctrl-names = "default";
+ samsung,uart-fifosize = <64>;
+ status = "disabled";
+ };
};
cmu_hsi0: clock-controller@10a00000 {
--
2.50.1Hi Denzeel, kernel test robot noticed the following build errors: [auto build test ERROR on 98ee0e036cfedf543c4728a604fd7870d0000efd] url: https://github.com/intel-lab-lkp/linux/commits/Denzeel-Oliva/dt-bindings-soc-samsung-exynos-sysreg-Add-Exynos990-PERIC0-1-compatibles/20250908-061748 base: 98ee0e036cfedf543c4728a604fd7870d0000efd patch link: https://lore.kernel.org/r/20250907-perics-add-usinodes-v2-6-58f41796d2d3%40gmail.com patch subject: [PATCH v2 6/8] arm64: dts: exynos990: Add UART nodes for PERIC0/1 config: arm64-randconfig-003-20250909 (https://download.01.org/0day-ci/archive/20250910/202509100100.bccnVSbn-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 11.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250910/202509100100.bccnVSbn-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202509100100.bccnVSbn-lkp@intel.com/ All errors (new ones prefixed by >>): Error: arch/arm64/boot/dts/exynos/exynos990.dtsi:517.4-5 syntax error >> FATAL ERROR: Unable to parse input tree -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
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