[v2] tegra-video: add CSI support for Tegra20 and Tegra30

[PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks

Posted by Svyatoslav Ryhel 3 days, 2 hours ago

Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
clk-tegra30 source.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
 drivers/clk/tegra/clk-tegra30.c         | 1 +
 include/dt-bindings/clock/tegra30-car.h | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
index ca367184e185..ca738bc64615 100644
--- a/drivers/clk/tegra/clk-tegra30.c
+++ b/drivers/clk/tegra/clk-tegra30.c
@@ -53,6 +53,7 @@
 #define SYSTEM_CLK_RATE 0x030
 
 #define TEGRA30_CLK_PERIPH_BANKS	5
+#define TEGRA30_CLK_CLK_MAX		311
 
 #define PLLC_BASE 0x80
 #define PLLC_MISC 0x8c
diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h
index f193663e6f28..763b81f80908 100644
--- a/include/dt-bindings/clock/tegra30-car.h
+++ b/include/dt-bindings/clock/tegra30-car.h
@@ -271,6 +271,7 @@
 #define TEGRA30_CLK_AUDIO3_MUX 306
 #define TEGRA30_CLK_AUDIO4_MUX 307
 #define TEGRA30_CLK_SPDIF_MUX 308
-#define TEGRA30_CLK_CLK_MAX 309
+#define TEGRA30_CLK_CSIA_PAD 309
+#define TEGRA30_CLK_CSIB_PAD 310
 
 #endif	/* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */
-- 
2.48.1

Re: [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks

Posted by Krzysztof Kozlowski 2 days, 6 hours ago

On Sat, Sep 06, 2025 at 04:53:23PM +0300, Svyatoslav Ryhel wrote:
> Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
> Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
> clk-tegra30 source.
> 
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
>  drivers/clk/tegra/clk-tegra30.c         | 1 +
>  include/dt-bindings/clock/tegra30-car.h | 3 ++-
>  2 files changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
> index ca367184e185..ca738bc64615 100644
> --- a/drivers/clk/tegra/clk-tegra30.c
> +++ b/drivers/clk/tegra/clk-tegra30.c
> @@ -53,6 +53,7 @@
>  #define SYSTEM_CLK_RATE 0x030
>  
>  #define TEGRA30_CLK_PERIPH_BANKS	5
> +#define TEGRA30_CLK_CLK_MAX		311

Unused define drop.

Also, don't mix bindings and drivers. You cannot create such
dependencies.

Best regards,
Krzysztof

Re: [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks

Posted by Svyatoslav Ryhel 2 days, 6 hours ago

нд, 7 вер. 2025 р. о 12:34 Krzysztof Kozlowski <krzk@kernel.org> пише:
>
> On Sat, Sep 06, 2025 at 04:53:23PM +0300, Svyatoslav Ryhel wrote:
> > Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
> > Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
> > clk-tegra30 source.
> >
> > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> > ---
> >  drivers/clk/tegra/clk-tegra30.c         | 1 +
> >  include/dt-bindings/clock/tegra30-car.h | 3 ++-
> >  2 files changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
> > index ca367184e185..ca738bc64615 100644
> > --- a/drivers/clk/tegra/clk-tegra30.c
> > +++ b/drivers/clk/tegra/clk-tegra30.c
> > @@ -53,6 +53,7 @@
> >  #define SYSTEM_CLK_RATE 0x030
> >
> >  #define TEGRA30_CLK_PERIPH_BANKS     5
> > +#define TEGRA30_CLK_CLK_MAX          311
>
> Unused define drop.
>

Specify, your comment is not clear.

> Also, don't mix bindings and drivers. You cannot create such
> dependencies.

I literally did what you told me to do! TEGRA30_CLK_CLK_MAX was
removed from binding, but it is used by the driver, so how you propose
to handle this without redefining TEGRA30_CLK_CLK_MAX and breaking
build with missing TEGRA30_CLK_CLK_MAX?

>
> Best regards,
> Krzysztof
>

Re: [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks

Posted by Krzysztof Kozlowski 1 day, 22 hours ago

On 07/09/2025 11:43, Svyatoslav Ryhel wrote:
> нд, 7 вер. 2025 р. о 12:34 Krzysztof Kozlowski <krzk@kernel.org> пише:
>>
>> On Sat, Sep 06, 2025 at 04:53:23PM +0300, Svyatoslav Ryhel wrote:
>>> Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
>>> Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
>>> clk-tegra30 source.
>>>
>>> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
>>> ---
>>>  drivers/clk/tegra/clk-tegra30.c         | 1 +
>>>  include/dt-bindings/clock/tegra30-car.h | 3 ++-
>>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
>>> index ca367184e185..ca738bc64615 100644
>>> --- a/drivers/clk/tegra/clk-tegra30.c
>>> +++ b/drivers/clk/tegra/clk-tegra30.c
>>> @@ -53,6 +53,7 @@
>>>  #define SYSTEM_CLK_RATE 0x030
>>>
>>>  #define TEGRA30_CLK_PERIPH_BANKS     5
>>> +#define TEGRA30_CLK_CLK_MAX          311
>>
>> Unused define drop.
>>
> 
> Specify, your comment is not clear.
> 
>> Also, don't mix bindings and drivers. You cannot create such
>> dependencies.
> 
> I literally did what you told me to do! TEGRA30_CLK_CLK_MAX was
> removed from binding, but it is used by the driver, so how you propose


I missed that you remove here old CLK_MAX... well, you did it quite
different than all other cases leading to driver-binding dependency.
Really, I thought you will just fix it immediately after my feedback and
then new bindings come later, just like we did for every other SoC.

> to handle this without redefining TEGRA30_CLK_CLK_MAX and breaking
> build with missing TEGRA30_CLK_CLK_MAX?
There is really no problem there and if you put here at least some
effort you would see how everyone else did it - add define to the driver
in cleanup series, month ago or so and then change bindings.

Fine to do it that way

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>



Best regards,
Krzysztof