Radxa E20C provides one of its GbE ports through RTL8111H connected to
SoC's PCIe controller. Let's enable the controller and the PHY used by
it to allow usage of the port.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 .../boot/dts/rockchip/rk3528-radxa-e20c.dts     | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
index 12eec2c1db22..e880c7a7e674 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
@@ -171,6 +171,10 @@ vdd_logic: regulator-vdd-logic {
 	};
 };
 
+&combphy {
+	status = "okay";
+};
+
 &cpu0 {
 	cpu-supply = <&vdd_arm>;
 };
@@ -229,6 +233,13 @@ rgmii_phy: ethernet-phy@1 {
 	};
 };
 
+&pcie {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pciem1_pins>, <&pcie_reset_g>;
+	reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
+
 &pinctrl {
 	ethernet {
 		gmac1_rstn_l: gmac1-rstn-l {
@@ -256,6 +267,12 @@ wan_led_g: wan-led-g {
 		};
 	};
 
+	pcie {
+		pcie_reset_g: pcie-reset-g {
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	sdmmc {
 		sdmmc_vol_ctrl_h: sdmmc-vol-ctrl-h {
 			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
-- 
2.50.1

Hi,

> +&pcie {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pciem1_pins>, <&pcie_reset_g>;

The pciem1_pins contains PCIE20_PERSTn_M1 (GPIO1_A2)
This will cause conflicts, "pinctrl-0 = <&pciem1_pins>" is enough.

[    0.115608] rockchip-pinctrl pinctrl: not freeing pin 34 (gpio1-2) as part of deactivating group pciem1-pins - it is already used for some other setting
[    0.191042] rockchip-pinctrl pinctrl: pin gpio1-2 already requeste by pll_gpll; cannot claim for 140000000.pcie
[    0.191949] rockchip-pinctrl pinctrl: error -EINVAL: pin-34 (140000000.pcie)
[    0.192570] rockchip-pinctrl pinctrl: error -EINVAL: could not request pin 34 (gpio1-2) from group pciem1-pins on device rockchip-pinctrl

> +	reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;

Missing supply: "vpcie3v3-supply = <&vcc_3v3>;"

> +	status = "okay";
> +};
> +

Thanks,
Chukun

On Tue, Sep 09, 2025 at 09:00:09PM +0800, Chukun Pan wrote:
> Hi,
> 
> > +&pcie {
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pciem1_pins>, <&pcie_reset_g>;
> 
> The pciem1_pins contains PCIE20_PERSTn_M1 (GPIO1_A2)
> This will cause conflicts, "pinctrl-0 = <&pciem1_pins>" is enough.
> 
> [    0.115608] rockchip-pinctrl pinctrl: not freeing pin 34 (gpio1-2) as part of deactivating group pciem1-pins - it is already used for some other setting
> [    0.191042] rockchip-pinctrl pinctrl: pin gpio1-2 already requeste by pll_gpll; cannot claim for 140000000.pcie
> [    0.191949] rockchip-pinctrl pinctrl: error -EINVAL: pin-34 (140000000.pcie)
> [    0.192570] rockchip-pinctrl pinctrl: error -EINVAL: could not request pin 34 (gpio1-2) from group pciem1-pins on device rockchip-pinctrl
> 
> > +	reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
> 
> Missing supply: "vpcie3v3-supply = <&vcc_3v3>;"
> 
> > +	status = "okay";
> > +};
> > +

Will fix them in v2, thanks.

> Thanks,
> Chukun

Best regards,
Yao Zi