Document the bindings for the ADSP, CDSP, MPSS and WPSS PAS on the Milos
(e.g. SM7635) SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../bindings/remoteproc/qcom,milos-pas.yaml | 201 +++++++++++++++++++++
1 file changed, 201 insertions(+)
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..790ad38a0330bf81f6333e887522ddb97690edbc
--- /dev/null
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml
@@ -0,0 +1,201 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/remoteproc/qcom,milos-pas.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Milos SoC Peripheral Authentication Service
+
+maintainers:
+ - Luca Weiss <luca.weiss@fairphone.com>
+
+description:
+ Qualcomm Milos SoC Peripheral Authentication Service loads and boots firmware
+ on the Qualcomm DSP Hexagon cores.
+
+properties:
+ compatible:
+ enum:
+ - qcom,milos-adsp-pas
+ - qcom,milos-cdsp-pas
+ - qcom,milos-mpss-pas
+ - qcom,milos-wpss-pas
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: XO clock
+
+ clock-names:
+ items:
+ - const: xo
+
+ interrupts:
+ minItems: 6
+ maxItems: 6
+
+ interrupt-names:
+ minItems: 6
+ maxItems: 6
+
+ qcom,qmp:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: Reference to the AOSS side-channel message RAM.
+
+ smd-edge: false
+
+ firmware-name:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ minItems: 1
+ items:
+ - description: Firmware name of the Hexagon core
+ - description: Firmware name of the Hexagon Devicetree
+
+ memory-region:
+ minItems: 1
+ items:
+ - description: Memory region for core Firmware authentication
+ - description: Memory region for Devicetree Firmware authentication
+
+required:
+ - compatible
+ - reg
+ - memory-region
+
+allOf:
+ - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,milos-adsp-pas
+ - qcom,milos-cdsp-pas
+ then:
+ properties:
+ memory-region:
+ minItems: 2
+ maxItems: 2
+ firmware-name:
+ minItems: 2
+ maxItems: 2
+ else:
+ properties:
+ memory-region:
+ maxItems: 1
+ firmware-name:
+ maxItems: 1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,milos-adsp-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: LCX power domain
+ - description: LMX power domain
+ power-domain-names:
+ items:
+ - const: lcx
+ - const: lmx
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,milos-cdsp-pas
+ - qcom,milos-wpss-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MX power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mx
+
+ - if:
+ properties:
+ compatible:
+ enum:
+ - qcom,milos-mpss-pas
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: CX power domain
+ - description: MSS power domain
+ power-domain-names:
+ items:
+ - const: cx
+ - const: mss
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ #include <dt-bindings/interconnect/qcom,icc.h>
+ #include <dt-bindings/interconnect/qcom,milos-rpmh.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/mailbox/qcom-ipcc.h>
+ #include <dt-bindings/power/qcom,rpmhpd.h>
+
+ remoteproc@3000000 {
+ compatible = "qcom,milos-adsp-pas";
+ reg = <0x03000000 0x10000>;
+
+ interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog",
+ "fatal",
+ "ready",
+ "handover",
+ "stop-ack",
+ "shutdown-ack";
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "xo";
+
+ power-domains = <&rpmhpd RPMHPD_LCX>,
+ <&rpmhpd RPMHPD_LMX>;
+ power-domain-names = "lcx",
+ "lmx";
+
+ interconnects = <&lpass_ag_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS
+ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+
+ memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>;
+
+ firmware-name = "qcom/milos/vendor/device/adsp.mbn",
+ "qcom/milos/vendor/device/adsp_dtb.mbn";
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&smp2p_adsp_out 0>;
+ qcom,smem-state-names = "stop";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_LPASS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "lpass";
+ qcom,remote-pid = <2>;
+
+ /* ... */
+ };
+ };
--
2.51.0
On Fri, Sep 05, 2025 at 11:37:04AM +0200, Luca Weiss wrote: > Document the bindings for the ADSP, CDSP, MPSS and WPSS PAS on the Milos > (e.g. SM7635) SoC. > > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> > --- > .../bindings/remoteproc/qcom,milos-pas.yaml | 201 +++++++++++++++++++++ > 1 file changed, 201 insertions(+) > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..790ad38a0330bf81f6333e887522ddb97690edbc > --- /dev/null > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,milos-pas.yaml > @@ -0,0 +1,201 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/remoteproc/qcom,milos-pas.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Milos SoC Peripheral Authentication Service > + > +maintainers: > + - Luca Weiss <luca.weiss@fairphone.com> > + > +description: > + Qualcomm Milos SoC Peripheral Authentication Service loads and boots firmware > + on the Qualcomm DSP Hexagon cores. > + > +properties: > + compatible: > + enum: > + - qcom,milos-adsp-pas > + - qcom,milos-cdsp-pas > + - qcom,milos-mpss-pas > + - qcom,milos-wpss-pas > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: XO clock > + > + clock-names: > + items: > + - const: xo > + > + interrupts: > + minItems: 6 > + maxItems: 6 > + > + interrupt-names: > + minItems: 6 > + maxItems: 6 > + > + qcom,qmp: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: Reference to the AOSS side-channel message RAM. > + > + smd-edge: false > + > + firmware-name: > + $ref: /schemas/types.yaml#/definitions/string-array Drop. Already has a type. > + minItems: 1 > + items: > + - description: Firmware name of the Hexagon core > + - description: Firmware name of the Hexagon Devicetree > + > + memory-region: > + minItems: 1 > + items: > + - description: Memory region for core Firmware authentication > + - description: Memory region for Devicetree Firmware authentication > + > +required: > + - compatible > + - reg > + - memory-region > + > +allOf: > + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# > + - if: > + properties: > + compatible: > + enum: > + - qcom,milos-adsp-pas > + - qcom,milos-cdsp-pas > + then: > + properties: > + memory-region: > + minItems: 2 > + maxItems: 2 Max is already 2. Drop. > + firmware-name: > + minItems: 2 > + maxItems: 2 Max is already 2. Drop. > + else: > + properties: > + memory-region: > + maxItems: 1 > + firmware-name: > + maxItems: 1 > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,milos-adsp-pas > + then: > + properties: > + power-domains: > + items: > + - description: LCX power domain > + - description: LMX power domain > + power-domain-names: > + items: > + - const: lcx > + - const: lmx > + > + - if: > + properties: > + compatible: > + enum: > + - qcom,milos-cdsp-pas > + - qcom,milos-wpss-pas > + then: > + properties: > + power-domains: > + items: > + - description: CX power domain > + - description: MX power domain > + power-domain-names: > + items: > + - const: cx > + - const: mx > + > + - if: > + properties: > + compatible: > + enum: > + - qcom,milos-mpss-pas > + then: > + properties: > + power-domains: > + items: > + - description: CX power domain > + - description: MSS power domain > + power-domain-names: > + items: > + - const: cx > + - const: mss > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/qcom,rpmh.h> > + #include <dt-bindings/interconnect/qcom,icc.h> > + #include <dt-bindings/interconnect/qcom,milos-rpmh.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/mailbox/qcom-ipcc.h> > + #include <dt-bindings/power/qcom,rpmhpd.h> > + > + remoteproc@3000000 { > + compatible = "qcom,milos-adsp-pas"; > + reg = <0x03000000 0x10000>; > + > + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, > + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; > + interrupt-names = "wdog", > + "fatal", > + "ready", > + "handover", > + "stop-ack", > + "shutdown-ack"; > + > + clocks = <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "xo"; > + > + power-domains = <&rpmhpd RPMHPD_LCX>, > + <&rpmhpd RPMHPD_LMX>; > + power-domain-names = "lcx", > + "lmx"; > + > + interconnects = <&lpass_ag_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWAYS > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; > + > + memory-region = <&adspslpi_mem>, <&q6_adsp_dtb_mem>; > + > + firmware-name = "qcom/milos/vendor/device/adsp.mbn", > + "qcom/milos/vendor/device/adsp_dtb.mbn"; > + > + qcom,qmp = <&aoss_qmp>; > + > + qcom,smem-states = <&smp2p_adsp_out 0>; > + qcom,smem-state-names = "stop"; > + > + glink-edge { > + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP > + IRQ_TYPE_EDGE_RISING>; > + mboxes = <&ipcc IPCC_CLIENT_LPASS > + IPCC_MPROC_SIGNAL_GLINK_QMP>; > + > + label = "lpass"; > + qcom,remote-pid = <2>; > + > + /* ... */ > + }; > + }; > > -- > 2.51.0 >
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