dmaengine: Smart Data Accelerator Interface (SDXI) basic support

[PATCH RFC 01/13] PCI: Add SNIA SDXI accelerator sub-class

Posted by Nathan Lynch via B4 Relay 4 days, 11 hours ago

From: Nathan Lynch <nathan.lynch@amd.com>

This was added to the PCI Code and ID Assignment Specification in
revision 1.14 (2021). Refer to 1.19. "Base Class 12h" of that document
as well as the "SDXI PCI-Express Device Architecture" chapter of the
SDXI specification:

"""
  SDXI functions are expected to be identified through the SDXI class
  code.
  * SNIA Smart Data Accelerator Interface (SDXI) controller:
    * Base Class = 0x12
    * Sub Class = 0x01
    * Programming Interface = 0x0
"""

Information about SDXI may be found at the SNIA website:

  https://www.snia.org/sdxi

Co-developed-by: Wei Huang <wei.huang2@amd.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Signed-off-by: Nathan Lynch <nathan.lynch@amd.com>
---
 include/linux/pci_ids.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 92ffc4373f6de3dcf82226a50d0e36af366e888e..ac9bb3d64949919019d40d1f86cd3658bfb1c661 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -154,6 +154,7 @@
 
 #define PCI_BASE_CLASS_ACCELERATOR	0x12
 #define PCI_CLASS_ACCELERATOR_PROCESSING	0x1200
+#define PCI_CLASS_ACCELERATOR_SDXI		0x120100
 
 #define PCI_CLASS_OTHERS		0xff
 

-- 
2.39.5