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[PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible

Santhosh Kumar K posted 4 patches 4 weeks ago
There is a newer version of this series
[PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible
Posted by Santhosh Kumar K 4 weeks ago 
From: Vignesh Raghavendra <vigneshr@ti.com>

Convert few open coded bit shifts to BIT() macro for better readability.
No functional changes intended.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
---
 drivers/spi/spi-cadence-quadspi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index da3ec15abb3e..b18f095516f2 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -335,7 +335,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
 {
 	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
 
-	return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
+	return reg & BIT(CQSPI_REG_CONFIG_IDLE_LSB);
 }
 
 static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)
@@ -571,7 +571,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
 		reg |= (dummy_clk & CQSPI_REG_CMDCTRL_DUMMY_MASK)
 		     << CQSPI_REG_CMDCTRL_DUMMY_LSB;
 
-	reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB);
+	reg |= BIT(CQSPI_REG_CMDCTRL_RD_EN_LSB);
 
 	/* 0 means 1 byte. */
 	reg |= (((n_rx - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK)
@@ -1191,7 +1191,7 @@ static void cqspi_chipselect(struct cqspi_flash_pdata *f_pdata)
 		 * CS2 to 4b'1011
 		 * CS3 to 4b'0111
 		 */
-		chip_select = 0xF & ~(1 << chip_select);
+		chip_select = 0xF & ~BIT(chip_select);
 	}
 
 	reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
-- 
2.34.1
Re: [PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible
Posted by Pratyush Yadav 4 weeks ago 
On Thu, Sep 04 2025, Santhosh Kumar K wrote:

> From: Vignesh Raghavendra <vigneshr@ti.com>
>
> Convert few open coded bit shifts to BIT() macro for better readability.
> No functional changes intended.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>

I see there are total 7 hits for the pattern "1 <<". Why not convert
them all while you're at it?

> ---
>  drivers/spi/spi-cadence-quadspi.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
> index da3ec15abb3e..b18f095516f2 100644
> --- a/drivers/spi/spi-cadence-quadspi.c
> +++ b/drivers/spi/spi-cadence-quadspi.c
> @@ -335,7 +335,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
>  {
>  	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
>  
> -	return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
> +	return reg & BIT(CQSPI_REG_CONFIG_IDLE_LSB);
>  }
>  
>  static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)
> @@ -571,7 +571,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
>  		reg |= (dummy_clk & CQSPI_REG_CMDCTRL_DUMMY_MASK)
>  		     << CQSPI_REG_CMDCTRL_DUMMY_LSB;
>  
> -	reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB);
> +	reg |= BIT(CQSPI_REG_CMDCTRL_RD_EN_LSB);
>  
>  	/* 0 means 1 byte. */
>  	reg |= (((n_rx - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK)
> @@ -1191,7 +1191,7 @@ static void cqspi_chipselect(struct cqspi_flash_pdata *f_pdata)
>  		 * CS2 to 4b'1011
>  		 * CS3 to 4b'0111
>  		 */
> -		chip_select = 0xF & ~(1 << chip_select);
> +		chip_select = 0xF & ~BIT(chip_select);
>  	}
>  
>  	reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK

-- 
Regards,
Pratyush Yadav
Re: [PATCH 4/4] spi: cadence-quadspi: Use BIT() macros where possible
Posted by Santhosh Kumar K 3 weeks, 6 days ago 

On 04/09/25 20:19, Pratyush Yadav wrote:
> On Thu, Sep 04 2025, Santhosh Kumar K wrote:
> 
>> From: Vignesh Raghavendra <vigneshr@ti.com>
>>
>> Convert few open coded bit shifts to BIT() macro for better readability.
>> No functional changes intended.
>>
>> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
>> Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
> 
> I see there are total 7 hits for the pattern "1 <<". Why not convert
> them all while you're at it?

Yeah, I just checked - I'll convert them as well.

Regards,
Santhosh.

> 
>> ---
>>   drivers/spi/spi-cadence-quadspi.c | 6 +++---
>>   1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
>> index da3ec15abb3e..b18f095516f2 100644
>> --- a/drivers/spi/spi-cadence-quadspi.c
>> +++ b/drivers/spi/spi-cadence-quadspi.c
>> @@ -335,7 +335,7 @@ static bool cqspi_is_idle(struct cqspi_st *cqspi)
>>   {
>>   	u32 reg = readl(cqspi->iobase + CQSPI_REG_CONFIG);
>>   
>> -	return reg & (1UL << CQSPI_REG_CONFIG_IDLE_LSB);
>> +	return reg & BIT(CQSPI_REG_CONFIG_IDLE_LSB);
>>   }
>>   
>>   static u32 cqspi_get_rd_sram_level(struct cqspi_st *cqspi)
>> @@ -571,7 +571,7 @@ static int cqspi_command_read(struct cqspi_flash_pdata *f_pdata,
>>   		reg |= (dummy_clk & CQSPI_REG_CMDCTRL_DUMMY_MASK)
>>   		     << CQSPI_REG_CMDCTRL_DUMMY_LSB;
>>   
>> -	reg |= (0x1 << CQSPI_REG_CMDCTRL_RD_EN_LSB);
>> +	reg |= BIT(CQSPI_REG_CMDCTRL_RD_EN_LSB);
>>   
>>   	/* 0 means 1 byte. */
>>   	reg |= (((n_rx - 1) & CQSPI_REG_CMDCTRL_RD_BYTES_MASK)
>> @@ -1191,7 +1191,7 @@ static void cqspi_chipselect(struct cqspi_flash_pdata *f_pdata)
>>   		 * CS2 to 4b'1011
>>   		 * CS3 to 4b'0111
>>   		 */
>> -		chip_select = 0xF & ~(1 << chip_select);
>> +		chip_select = 0xF & ~BIT(chip_select);
>>   	}
>>   
>>   	reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
>

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