From: Shangjuan Wei <weishangjuan@eswincomputing.com>
Add Ethernet controller support for Eswin's eic7700 SoC. The driver
provides management and control of Ethernet signals for the eiC7700
series chips.
Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 +
drivers/net/ethernet/stmicro/stmmac/Makefile | 1 +
.../ethernet/stmicro/stmmac/dwmac-eic7700.c | 250 ++++++++++++++++++
3 files changed, 262 insertions(+)
create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 67fa879b1e52..a13b15ce1abd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -67,6 +67,17 @@ config DWMAC_ANARION
This selects the Anarion SoC glue layer support for the stmmac driver.
+config DWMAC_EIC7700
+ tristate "Support for Eswin eic7700 ethernet driver"
+ select CRC32
+ select MII
+ depends on OF && HAS_DMA && ARCH_ESWIN || COMPILE_TEST
+ help
+ This driver supports the Eswin EIC7700 Ethernet controller,
+ which integrates Synopsys DesignWare QoS features. It enables
+ high-speed networking with DMA acceleration and is optimized
+ for embedded systems.
+
config DWMAC_INGENIC
tristate "Ingenic MAC support"
default MACH_INGENIC
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile
index b591d93f8503..f4ec5fc16571 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -14,6 +14,7 @@ stmmac-$(CONFIG_STMMAC_SELFTESTS) += stmmac_selftests.o
# Ordering matters. Generic driver must be last.
obj-$(CONFIG_STMMAC_PLATFORM) += stmmac-platform.o
obj-$(CONFIG_DWMAC_ANARION) += dwmac-anarion.o
+obj-$(CONFIG_DWMAC_EIC7700) += dwmac-eic7700.o
obj-$(CONFIG_DWMAC_INGENIC) += dwmac-ingenic.o
obj-$(CONFIG_DWMAC_IPQ806X) += dwmac-ipq806x.o
obj-$(CONFIG_DWMAC_LPC18XX) += dwmac-lpc18xx.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
new file mode 100644
index 000000000000..b6c99562ccc5
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-eic7700.c
@@ -0,0 +1,250 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Eswin DWC Ethernet linux driver
+ *
+ * Copyright 2025, Beijing ESWIN Computing Technology Co., Ltd.
+ *
+ * Authors:
+ * Zhi Li <lizhi2@eswincomputing.com>
+ * Shuang Liang <liangshuang@eswincomputing.com>
+ * Shangjuan Wei <weishangjuan@eswincomputing.com>
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mfd/syscon.h>
+#include <linux/stmmac.h>
+#include <linux/regmap.h>
+#include <linux/of.h>
+
+#include "stmmac_platform.h"
+
+/* eth_phy_ctrl_offset eth0:0x100 */
+#define EIC7700_ETH_TX_CLK_SEL BIT(16)
+#define EIC7700_ETH_PHY_INTF_SELI BIT(0)
+
+/* eth_axi_lp_ctrl_offset eth0:0x108 */
+#define EIC7700_ETH_CSYSREQ_VAL BIT(0)
+
+/*
+ * TX/RX Clock Delay Bit Masks:
+ * - TX Delay: bits [14:8] — TX_CLK delay (unit: 0.1ns per bit)
+ * - RX Delay: bits [30:24] — RX_CLK delay (unit: 0.1ns per bit)
+ */
+#define EIC7700_ETH_TX_ADJ_DELAY GENMASK(14, 8)
+#define EIC7700_ETH_RX_ADJ_DELAY GENMASK(30, 24)
+
+#define EIC7700_MAX_DELAY_UNIT 0x7F
+
+static const char * const eic7700_clk_names[] = {
+ "tx", "axi", "cfg",
+};
+
+struct eic7700_qos_priv {
+ struct plat_stmmacenet_data *plat_dat;
+ struct device *dev;
+ struct regmap *hsp_regmap;
+ u32 tx_delay_ps;
+ u32 rx_delay_ps;
+};
+
+/**
+ * eic7700_apply_delay - Apply TX or RX delay to a register value.
+ * @delay_ps: Delay in picoseconds, converted to 0.1ns units.
+ * @reg: Pointer to register value to update in-place.
+ * @is_rx: True for RX delay (bits 30:24), false for TX delay (bits 14:8).
+ *
+ * Converts delay from ps to 0.1ns units, capped by EIC7700_MAX_DELAY_UNIT.
+ * Updates only the RX or TX delay field (using FIELD_PREP), leaving all
+ * other bits in *@reg unchanged.
+ */
+static void eic7700_apply_delay(u32 delay_ps, u32 *reg, bool is_rx)
+{
+ u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);
+
+ if (is_rx) {
+ *reg &= ~EIC7700_ETH_RX_ADJ_DELAY;
+ *reg |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
+ } else {
+ *reg &= ~EIC7700_ETH_TX_ADJ_DELAY;
+ *reg |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
+ }
+}
+
+static int eic7700_clks_config(void *priv, bool enabled)
+{
+ struct eic7700_qos_priv *dwc = (struct eic7700_qos_priv *)priv;
+ struct plat_stmmacenet_data *plat = dwc->plat_dat;
+ int ret = 0;
+
+ if (enabled)
+ ret = clk_bulk_prepare_enable(plat->num_clks, plat->clks);
+ else
+ clk_bulk_disable_unprepare(plat->num_clks, plat->clks);
+
+ return ret;
+}
+
+static int eic7700_dwmac_probe(struct platform_device *pdev)
+{
+ struct plat_stmmacenet_data *plat_dat;
+ struct stmmac_resources stmmac_res;
+ struct eic7700_qos_priv *dwc_priv;
+ u32 eth_axi_lp_ctrl_offset;
+ u32 eth_phy_ctrl_offset;
+ u32 eth_phy_ctrl_regset;
+ u32 eth_rxd_dly_offset;
+ u32 eth_dly_param = 0;
+ int i, ret;
+
+ ret = stmmac_get_platform_resources(pdev, &stmmac_res);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "failed to get resources\n");
+
+ plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
+ if (IS_ERR(plat_dat))
+ return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
+ "dt configuration failed\n");
+
+ dwc_priv = devm_kzalloc(&pdev->dev, sizeof(*dwc_priv), GFP_KERNEL);
+ if (!dwc_priv)
+ return -ENOMEM;
+
+ dwc_priv->dev = &pdev->dev;
+
+ /* Read rx-internal-delay-ps and update rx_clk delay */
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "rx-internal-delay-ps",
+ &dwc_priv->rx_delay_ps)) {
+ eic7700_apply_delay(dwc_priv->rx_delay_ps,
+ ð_dly_param, true);
+ } else {
+ dev_warn(&pdev->dev, "can't get rx-internal-delay-ps\n");
+ }
+
+ /* Read tx-internal-delay-ps and update tx_clk delay */
+ if (!of_property_read_u32(pdev->dev.of_node,
+ "tx-internal-delay-ps",
+ &dwc_priv->tx_delay_ps)) {
+ eic7700_apply_delay(dwc_priv->tx_delay_ps,
+ ð_dly_param, false);
+ } else {
+ dev_warn(&pdev->dev, "can't get tx-internal-delay-ps\n");
+ }
+
+ dwc_priv->hsp_regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
+ "eswin,hsp-sp-csr");
+ if (IS_ERR(dwc_priv->hsp_regmap))
+ return dev_err_probe(&pdev->dev,
+ PTR_ERR(dwc_priv->hsp_regmap),
+ "Failed to get hsp-sp-csr regmap\n");
+
+ ret = of_property_read_u32_index(pdev->dev.of_node,
+ "eswin,hsp-sp-csr",
+ 1, ð_phy_ctrl_offset);
+ if (ret)
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "can't get eth_phy_ctrl_offset\n");
+
+ regmap_read(dwc_priv->hsp_regmap, eth_phy_ctrl_offset,
+ ð_phy_ctrl_regset);
+ eth_phy_ctrl_regset |=
+ (EIC7700_ETH_TX_CLK_SEL | EIC7700_ETH_PHY_INTF_SELI);
+ regmap_write(dwc_priv->hsp_regmap, eth_phy_ctrl_offset,
+ eth_phy_ctrl_regset);
+
+ ret = of_property_read_u32_index(pdev->dev.of_node,
+ "eswin,hsp-sp-csr",
+ 2, ð_axi_lp_ctrl_offset);
+ if (ret)
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "can't get eth_axi_lp_ctrl_offset\n");
+
+ regmap_write(dwc_priv->hsp_regmap, eth_axi_lp_ctrl_offset,
+ EIC7700_ETH_CSYSREQ_VAL);
+
+ ret = of_property_read_u32_index(pdev->dev.of_node,
+ "eswin,hsp-sp-csr",
+ 3, ð_rxd_dly_offset);
+ if (ret)
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "can't get eth_rxd_dly_offset\n");
+
+ regmap_write(dwc_priv->hsp_regmap, eth_rxd_dly_offset,
+ eth_dly_param);
+
+ plat_dat->num_clks = ARRAY_SIZE(eic7700_clk_names);
+ plat_dat->clks = devm_kcalloc(&pdev->dev,
+ plat_dat->num_clks,
+ sizeof(*plat_dat->clks),
+ GFP_KERNEL);
+ if (!plat_dat->clks)
+ return -ENOMEM;
+
+ for (i = 0; i < ARRAY_SIZE(eic7700_clk_names); i++)
+ plat_dat->clks[i].id = eic7700_clk_names[i];
+
+ ret = devm_clk_bulk_get_optional(&pdev->dev,
+ plat_dat->num_clks,
+ plat_dat->clks);
+ if (ret)
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "Failed to get clocks\n");
+
+ plat_dat->clk_tx_i = stmmac_pltfr_find_clk(plat_dat, "tx");
+ plat_dat->set_clk_tx_rate = stmmac_set_clk_tx_rate;
+ plat_dat->bsp_priv = dwc_priv;
+ plat_dat->clks_config = eic7700_clks_config;
+ dwc_priv->plat_dat = plat_dat;
+
+ ret = eic7700_clks_config(dwc_priv, true);
+ if (ret)
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "error enable clock\n");
+
+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ if (ret) {
+ eic7700_clks_config(dwc_priv, false);
+ return dev_err_probe(&pdev->dev,
+ ret,
+ "Failed to driver probe\n");
+ }
+
+ return ret;
+}
+
+static void eic7700_dwmac_remove(struct platform_device *pdev)
+{
+ struct eic7700_qos_priv *dwc_priv = get_stmmac_bsp_priv(&pdev->dev);
+
+ stmmac_pltfr_remove(pdev);
+ eic7700_clks_config(dwc_priv, false);
+}
+
+static const struct of_device_id eic7700_dwmac_match[] = {
+ { .compatible = "eswin,eic7700-qos-eth" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, eic7700_dwmac_match);
+
+static struct platform_driver eic7700_dwmac_driver = {
+ .probe = eic7700_dwmac_probe,
+ .remove = eic7700_dwmac_remove,
+ .driver = {
+ .name = "eic7700-eth-dwmac",
+ .pm = &stmmac_pltfr_pm_ops,
+ .of_match_table = eic7700_dwmac_match,
+ },
+};
+module_platform_driver(eic7700_dwmac_driver);
+
+MODULE_AUTHOR("Zhi Li <lizhi2@eswincomputing.com>");
+MODULE_AUTHOR("Shuang Liang <liangshuang@eswincomputing.com>");
+MODULE_AUTHOR("Shangjuan Wei <weishangjuan@eswincomputing.com>");
+MODULE_DESCRIPTION("Eswin eic7700 qos ethernet driver");
+MODULE_LICENSE("GPL");
--
2.17.1
On Thu, Sep 04, 2025 at 05:01:25PM +0800, weishangjuan@eswincomputing.com wrote:
> +struct eic7700_qos_priv {
> + struct plat_stmmacenet_data *plat_dat;
> + struct device *dev;
> + struct regmap *hsp_regmap;
> + u32 tx_delay_ps;
> + u32 rx_delay_ps;
> +};
> +
> +/**
> + * eic7700_apply_delay - Apply TX or RX delay to a register value.
> + * @delay_ps: Delay in picoseconds, converted to 0.1ns units.
> + * @reg: Pointer to register value to update in-place.
> + * @is_rx: True for RX delay (bits 30:24), false for TX delay (bits 14:8).
> + *
> + * Converts delay from ps to 0.1ns units, capped by EIC7700_MAX_DELAY_UNIT.
> + * Updates only the RX or TX delay field (using FIELD_PREP), leaving all
> + * other bits in *@reg unchanged.
> + */
> +static void eic7700_apply_delay(u32 delay_ps, u32 *reg, bool is_rx)
> +{
> + u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);
> +
> + if (is_rx) {
> + *reg &= ~EIC7700_ETH_RX_ADJ_DELAY;
> + *reg |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
> + } else {
> + *reg &= ~EIC7700_ETH_TX_ADJ_DELAY;
> + *reg |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
> + }
> +}
...
> + /* Read rx-internal-delay-ps and update rx_clk delay */
> + if (!of_property_read_u32(pdev->dev.of_node,
> + "rx-internal-delay-ps",
> + &dwc_priv->rx_delay_ps)) {
> + eic7700_apply_delay(dwc_priv->rx_delay_ps,
> + ð_dly_param, true);
I've been trying to figure out the reasoning behind the following:
1. the presence of dwc_priv->rx_delay_ps and dwc_priv->tx_delay_ps
rather than just using a local variable ("delay" ?)
2. the presence of eic7700_apply_delay() when we have to do something
different to get the delay value anyway
It seems to me that this should either be:
static void eic7700_parse_delay(u32 *reg, struct device *dev,
const char *name, bool is_rx)
{
u32 delay;
if (of_property_read_u32(dev->of_node, name, &delay)) {
dev_warn(dev, "can't get %s\n", name);
return
}
if (is_rx) {
*reg &= ~EIC7700_ETH_RX_ADJ_DELAY;
*reg |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, delay);
} else {
*reg &= ~EIC7700_ETH_TX_ADJ_DELAY;
*reg |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, delay);
}
}
or just not bother with the function at all and just write it out
fully in the probe function.
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
Dear Russell King,
Thank you for your valuable and professional suggestions.
You're right — tx_delay_ps, rx_delay_ps and hsp_regmap are
only used in probe, so we’ll switch them to local variables.
We’ll also inline the delay handling into probe as suggested.
This will be updated in the next version.
Best regards,
Li Zhi
Eswin Computing
> -----原始邮件-----
> 发件人: "Russell King (Oracle)" <linux@armlinux.org.uk>
> 发送时间:2025-09-04 18:26:24 (星期四)
> 收件人: weishangjuan@eswincomputing.com
> 抄送: devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, yong.liang.choong@linux.intel.com, vladimir.oltean@nxp.com, faizal.abdul.rahim@linux.intel.com, prabhakar.mahadev-lad.rj@bp.renesas.com, inochiama@gmail.com, jan.petrous@oss.nxp.com, jszhang@kernel.org, p.zabel@pengutronix.de, boon.khai.ng@altera.com, 0x1207@gmail.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, emil.renner.berthing@canonical.com, ningyu@eswincomputing.com, linmin@eswincomputing.com, lizhi2@eswincomputing.com, pinkesh.vaghela@einfochips.com
> 主题: Re: [PATCH v5 2/2] ethernet: eswin: Add eic7700 ethernet driver
>
> On Thu, Sep 04, 2025 at 05:01:25PM +0800, weishangjuan@eswincomputing.com wrote:
> > +struct eic7700_qos_priv {
> > + struct plat_stmmacenet_data *plat_dat;
> > + struct device *dev;
> > + struct regmap *hsp_regmap;
> > + u32 tx_delay_ps;
> > + u32 rx_delay_ps;
> > +};
> > +
> > +/**
> > + * eic7700_apply_delay - Apply TX or RX delay to a register value.
> > + * @delay_ps: Delay in picoseconds, converted to 0.1ns units.
> > + * @reg: Pointer to register value to update in-place.
> > + * @is_rx: True for RX delay (bits 30:24), false for TX delay (bits 14:8).
> > + *
> > + * Converts delay from ps to 0.1ns units, capped by EIC7700_MAX_DELAY_UNIT.
> > + * Updates only the RX or TX delay field (using FIELD_PREP), leaving all
> > + * other bits in *@reg unchanged.
> > + */
> > +static void eic7700_apply_delay(u32 delay_ps, u32 *reg, bool is_rx)
> > +{
> > + u32 val = min(delay_ps / 100, EIC7700_MAX_DELAY_UNIT);
> > +
> > + if (is_rx) {
> > + *reg &= ~EIC7700_ETH_RX_ADJ_DELAY;
> > + *reg |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, val);
> > + } else {
> > + *reg &= ~EIC7700_ETH_TX_ADJ_DELAY;
> > + *reg |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, val);
> > + }
> > +}
>
> ...
>
> > + /* Read rx-internal-delay-ps and update rx_clk delay */
> > + if (!of_property_read_u32(pdev->dev.of_node,
> > + "rx-internal-delay-ps",
> > + &dwc_priv->rx_delay_ps)) {
> > + eic7700_apply_delay(dwc_priv->rx_delay_ps,
> > + ð_dly_param, true);
>
> I've been trying to figure out the reasoning behind the following:
>
> 1. the presence of dwc_priv->rx_delay_ps and dwc_priv->tx_delay_ps
> rather than just using a local variable ("delay" ?)
> 2. the presence of eic7700_apply_delay() when we have to do something
> different to get the delay value anyway
>
> It seems to me that this should either be:
>
> static void eic7700_parse_delay(u32 *reg, struct device *dev,
> const char *name, bool is_rx)
> {
> u32 delay;
>
> if (of_property_read_u32(dev->of_node, name, &delay)) {
> dev_warn(dev, "can't get %s\n", name);
> return
> }
>
> if (is_rx) {
> *reg &= ~EIC7700_ETH_RX_ADJ_DELAY;
> *reg |= FIELD_PREP(EIC7700_ETH_RX_ADJ_DELAY, delay);
> } else {
> *reg &= ~EIC7700_ETH_TX_ADJ_DELAY;
> *reg |= FIELD_PREP(EIC7700_ETH_TX_ADJ_DELAY, delay);
> }
> }
>
> or just not bother with the function at all and just write it out
> fully in the probe function.
>
> Thanks.
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
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