From: Shangjuan Wei <weishangjuan@eswincomputing.com>
Add ESWIN EIC7700 Ethernet controller, supporting clock
configuration, delay adjustment and speed adaptive functions.
Signed-off-by: Zhi Li <lizhi2@eswincomputing.com>
Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com>
---
.../bindings/net/eswin,eic7700-eth.yaml | 128 ++++++++++++++++++
1 file changed, 128 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
diff --git a/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
new file mode 100644
index 000000000000..9771fed9604e
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/eswin,eic7700-eth.yaml
@@ -0,0 +1,128 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/eswin,eic7700-eth.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Eswin EIC7700 SOC Eth Controller
+
+maintainers:
+ - Shuang Liang <liangshuang@eswincomputing.com>
+ - Zhi Li <lizhi2@eswincomputing.com>
+ - Shangjuan Wei <weishangjuan@eswincomputing.com>
+
+description:
+ The eth controller registers are part of the syscrg block on
+ the EIC7700 SoC.
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - eswin,eic7700-qos-eth
+ required:
+ - compatible
+
+allOf:
+ - $ref: snps,dwmac.yaml#
+
+properties:
+ compatible:
+ items:
+ - const: eswin,eic7700-qos-eth
+ - const: snps,dwmac-5.20
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-names:
+ const: macirq
+
+ clocks:
+ items:
+ - description: AXI clock
+ - description: Configuration clock
+ - description: GMAC main clock
+ - description: Tx clock
+
+ clock-names:
+ items:
+ - const: axi
+ - const: cfg
+ - const: stmmaceth
+ - const: tx
+
+ resets:
+ maxItems: 1
+
+ reset-names:
+ items:
+ - const: stmmaceth
+
+ rx-internal-delay-ps:
+ enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
+
+ tx-internal-delay-ps:
+ enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
+
+ eswin,hsp-sp-csr:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - description: Phandle to HSP(High-Speed Peripheral) device
+ - description: Offset of phy control register for internal
+ or external clock selection
+ - description: Offset of AXI clock controller Low-Power request
+ register
+ - description: Offset of register controlling TX/RX clock delay
+ description: |
+ High-Speed Peripheral device needed to configure clock selection,
+ clock low-power mode and clock delay.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - phy-mode
+ - resets
+ - reset-names
+ - rx-internal-delay-ps
+ - tx-internal-delay-ps
+ - eswin,hsp-sp-csr
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ ethernet@50400000 {
+ compatible = "eswin,eic7700-qos-eth", "snps,dwmac-5.20";
+ reg = <0x50400000 0x10000>;
+ clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
+ <&d0_clock 193>;
+ clock-names = "axi", "cfg", "stmmaceth", "tx";
+ interrupt-parent = <&plic>;
+ interrupts = <61>;
+ interrupt-names = "macirq";
+ phy-mode = "rgmii-id";
+ phy-handle = <&phy0>;
+ resets = <&reset 95>;
+ reset-names = "stmmaceth";
+ rx-internal-delay-ps = <200>;
+ tx-internal-delay-ps = <200>;
+ eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,aal;
+ snps,fixed-burst;
+ snps,tso;
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <2>;
+ snps,wr_osr_lmt = <2>;
+ };
+ };
--
2.17.1On Thu, Sep 04, 2025 at 05:00:55PM +0800, weishangjuan@eswincomputing.com wrote: > From: Shangjuan Wei <weishangjuan@eswincomputing.com> > > Add ESWIN EIC7700 Ethernet controller, supporting clock > configuration, delay adjustment and speed adaptive functions. > > Signed-off-by: Zhi Li <lizhi2@eswincomputing.com> > Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Dear Krzysztof Kozlowski, I hope this email finds you well. First, please allow me to apologize for any inconvenience caused by the previous version of the yaml description. We have now revised the description content accordingly as follow: description: Platform glue layer implementation for STMMAC Ethernet driver. In addition, the link to v5 patches is as follows： https://lore.kernel.org/all/20250904090055.2546-1-weishangjuan@eswincomputing.com/ I have a question to seek your advice. After sending the v5 patches, we received your feedback. Originally, when preparing the v6 patches, we intended to include the "Reviewed-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org" tag. However, given that we have revised the yaml description, I am uncertain whether this tag should still be included in the v6 patches. Personally, I believe it would be appropriate to retain the "Reviewed-by" tag. Could you please confirm if this is correct? Thank you for your time and guidance. I look forward to your response. Best regards, Shangjuan Wei > -----原始邮件----- > 发件人: "Krzysztof Kozlowski" <krzk@kernel.org> > 发送时间:2025-09-05 15:53:30 (星期五) > 收件人: weishangjuan@eswincomputing.com > 抄送: devicetree@vger.kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-arm-kernel@lists.infradead.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, yong.liang.choong@linux.intel.com, vladimir.oltean@nxp.com, rmk+kernel@armlinux.org.uk, faizal.abdul.rahim@linux.intel.com, prabhakar.mahadev-lad.rj@bp.renesas.com, inochiama@gmail.com, jan.petrous@oss.nxp.com, jszhang@kernel.org, p.zabel@pengutronix.de, boon.khai.ng@altera.com, 0x1207@gmail.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, emil.renner.berthing@canonical.com, ningyu@eswincomputing.com, linmin@eswincomputing.com, lizhi2@eswincomputing.com, pinkesh.vaghela@einfochips.com > 主题: Re: [PATCH v5 1/2] dt-bindings: ethernet: eswin: Document for EIC7700 SoC > > On Thu, Sep 04, 2025 at 05:00:55PM +0800, weishangjuan@eswincomputing.com wrote: > > From: Shangjuan Wei <weishangjuan@eswincomputing.com> > > > > Add ESWIN EIC7700 Ethernet controller, supporting clock > > configuration, delay adjustment and speed adaptive functions. > > > > Signed-off-by: Zhi Li <lizhi2@eswincomputing.com> > > Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com> > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Best regards, > Krzysztof
© 2016 - 2025 Red Hat, Inc.