Fix and optimize cadence DPHY driver

[PATCH RESEND 0/3] Fix and optimize cadence DPHY driver

Harikrishna Shenoy posted 3 patches 4 weeks ago

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drivers/phy/cadence/cdns-dphy.c | 130 ++++++++++++++++++++++++--------
1 file changed, 97 insertions(+), 33 deletions(-)

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[PATCH RESEND 0/3] Fix and optimize cadence DPHY driver

Posted by Harikrishna Shenoy 4 weeks ago

This series optimizes the cadence dphy driver by below improvements:
- Fixes PLL lockup and O_CMN_READY timeout by moving the polling
function after common state machine gets enabled. Also fix the
calibration wait time to optimize the polling time.
- Enable support for data lane rates between 80-160 Mbps,
enables lower resolutions like 640x480 at 60Hz.

Series is a combination of below 2 series, rebased on top of next-20250901:
- https://lore.kernel.org/all/20250704125915.1224738-1-devarsht@ti.com/
- https://lore.kernel.org/all/20250807052002.717807-1-h-shenoy@ti.com/

Devarsh Thakkar (2):
  phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling
  phy: cadence: cdns-dphy: Update calibration wait time for startup
    state machine

Harikrishna Shenoy (1):
  drivers: phy: cadence: cdns-dphy: Enable lower resolutions in dphy

 drivers/phy/cadence/cdns-dphy.c | 130 ++++++++++++++++++++++++--------
 1 file changed, 97 insertions(+), 33 deletions(-)

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2.34.1