DCIF is the i.MX94 Display Controller Interface which is used to
drive a TFT LCD panel or connects to a display interface depending
on the chip configuration.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
---
.../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++
1 file changed, 82 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
new file mode 100644
index 0000000000000..54419c589ef74
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+# Copyright 2025 NXP
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX94 Display Control Interface (DCIF)
+
+maintainers:
+ - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
+
+description:
+ The Display Control Interface(DCIF) is a system master that fetches graphics
+ stored in memory and displays them on a TFT LCD panel or connects to a
+ display interface depending on the chip configuration.
+
+properties:
+ compatible:
+ const: nxp,imx94-dcif
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: CPU domain 0 (controlled by common registers group).
+ - description: CPU domain 1 (controlled by background layer registers group).
+ - description: CPU domain 2 (controlled by foreground layer registers group).
+
+ interrupt-names:
+ items:
+ - const: common
+ - const: bg_layer
+ - const: fg_layer
+
+ clocks:
+ maxItems: 3
+
+ clock-names:
+ items:
+ - const: apb
+ - const: axi
+ - const: pix
+
+ power-domains:
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Display Pixel Interface(DPI) output port
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ display-controller@4b120000 {
+ compatible = "nxp,imx94-dcif";
+ reg = <0x0 0x4b120000 0x0 0x300000>;
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "common", "bg_layer", "fg_layer";
+ clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
+ clock-names = "apb", "axi", "pix";
+ assigned-clocks = <&dispmix_csr 0>;
+ assigned-clock-parents = <&ldb_pll_pixel>;
+ power-domains = <&scmi_devpd 11>;
+
+ port {
+ dcif_out: endpoint {
+ remote-endpoint = <&ldb_in>;
+ };
+ };
+ };
+ };
--
2.49.0On Wed, Sep 03, 2025 at 03:33:22PM +0300, Laurentiu Palcu wrote:
> DCIF is the i.MX94 Display Controller Interface which is used to
> drive a TFT LCD panel or connects to a display interface depending
> on the chip configuration.
It looks like you are going to send v5, so:
A nit, subject: drop second/last, redundant "bindings for". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v6.17-rc3/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
Anyway, nothing in the changelog explains dropping tags.
I am not going to do the work twice. Write proper changelogs.
<form letter>
This is a friendly reminder during the review process.
It looks like you received a tag and forgot to add it.
If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions of patchset, under or above your Signed-off-by tag, unless
patch changed significantly (e.g. new properties added to the DT
bindings). Tag is "received", when provided in a message replied to you
on the mailing list. Tools like b4 can help here. However, there's no
need to repost patches *only* to add the tags. The upstream maintainer
will do that for tags received on the version they apply.
Please read:
https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577
If a tag was not added on purpose, please state why and what changed.
</form letter>
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> .../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++
> 1 file changed, 82 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> new file mode 100644
> index 0000000000000..54419c589ef74
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2025 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX94 Display Control Interface (DCIF)
> +
> +maintainers:
> + - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> +
> +description:
> + The Display Control Interface(DCIF) is a system master that fetches graphics
> + stored in memory and displays them on a TFT LCD panel or connects to a
> + display interface depending on the chip configuration.
> +
> +properties:
> + compatible:
> + const: nxp,imx94-dcif
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: CPU domain 0 (controlled by common registers group).
> + - description: CPU domain 1 (controlled by background layer registers group).
> + - description: CPU domain 2 (controlled by foreground layer registers group).
> +
> + interrupt-names:
> + items:
> + - const: common
> + - const: bg_layer
> + - const: fg_layer
> +
> + clocks:
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: apb
> + - const: axi
> + - const: pix
> +
> + power-domains:
> + maxItems: 1
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Display Pixel Interface(DPI) output port
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + display-controller@4b120000 {
> + compatible = "nxp,imx94-dcif";
> + reg = <0x0 0x4b120000 0x0 0x300000>;
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "common", "bg_layer", "fg_layer";
> + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
> + clock-names = "apb", "axi", "pix";
> + assigned-clocks = <&dispmix_csr 0>;
> + assigned-clock-parents = <&ldb_pll_pixel>;
> + power-domains = <&scmi_devpd 11>;
> +
> + port {
> + dcif_out: endpoint {
> + remote-endpoint = <&ldb_in>;
> + };
> + };
> + };
> + };
> --
> 2.49.0
>
On Thu, Sep 04, 2025 at 09:24:57AM +0200, Krzysztof Kozlowski wrote:
> On Wed, Sep 03, 2025 at 03:33:22PM +0300, Laurentiu Palcu wrote:
> > DCIF is the i.MX94 Display Controller Interface which is used to
> > drive a TFT LCD panel or connects to a display interface depending
> > on the chip configuration.
>
> It looks like you are going to send v5, so:
>
> A nit, subject: drop second/last, redundant "bindings for". The
> "dt-bindings" prefix is already stating that these are bindings.
> See also:
> https://elixir.bootlin.com/linux/v6.17-rc3/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
>
> Anyway, nothing in the changelog explains dropping tags.
>
> I am not going to do the work twice. Write proper changelogs.
Sorry about that. :/ I agree it's frustrating to do the same work
twice... I admit I was lazy and only wrote a changelog in the
cover-letter. I will try to add a changelog to each changed patch next
time.
The r-b tag was dropped in v4 because I removed the QoS functionality until
I find a better way to handle it. Hence, the 'nxp,blk-ctl' property in
the binding needed to be dropped as well.
Thanks,
Laurentiu
>
> <form letter>
> This is a friendly reminder during the review process.
>
> It looks like you received a tag and forgot to add it.
>
> If you do not know the process, here is a short explanation:
> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
> versions of patchset, under or above your Signed-off-by tag, unless
> patch changed significantly (e.g. new properties added to the DT
> bindings). Tag is "received", when provided in a message replied to you
> on the mailing list. Tools like b4 can help here. However, there's no
> need to repost patches *only* to add the tags. The upstream maintainer
> will do that for tags received on the version they apply.
>
> Please read:
> https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577
>
> If a tag was not added on purpose, please state why and what changed.
> </form letter>
>
> >
> > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > ---
> > .../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++
> > 1 file changed, 82 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> > new file mode 100644
> > index 0000000000000..54419c589ef74
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> > @@ -0,0 +1,82 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +# Copyright 2025 NXP
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: i.MX94 Display Control Interface (DCIF)
> > +
> > +maintainers:
> > + - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > +
> > +description:
> > + The Display Control Interface(DCIF) is a system master that fetches graphics
> > + stored in memory and displays them on a TFT LCD panel or connects to a
> > + display interface depending on the chip configuration.
> > +
> > +properties:
> > + compatible:
> > + const: nxp,imx94-dcif
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + interrupts:
> > + items:
> > + - description: CPU domain 0 (controlled by common registers group).
> > + - description: CPU domain 1 (controlled by background layer registers group).
> > + - description: CPU domain 2 (controlled by foreground layer registers group).
> > +
> > + interrupt-names:
> > + items:
> > + - const: common
> > + - const: bg_layer
> > + - const: fg_layer
> > +
> > + clocks:
> > + maxItems: 3
> > +
> > + clock-names:
> > + items:
> > + - const: apb
> > + - const: axi
> > + - const: pix
> > +
> > + power-domains:
> > + maxItems: 1
> > +
> > + port:
> > + $ref: /schemas/graph.yaml#/properties/port
> > + description: Display Pixel Interface(DPI) output port
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + soc {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + display-controller@4b120000 {
> > + compatible = "nxp,imx94-dcif";
> > + reg = <0x0 0x4b120000 0x0 0x300000>;
> > + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "common", "bg_layer", "fg_layer";
> > + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
> > + clock-names = "apb", "axi", "pix";
> > + assigned-clocks = <&dispmix_csr 0>;
> > + assigned-clock-parents = <&ldb_pll_pixel>;
> > + power-domains = <&scmi_devpd 11>;
> > +
> > + port {
> > + dcif_out: endpoint {
> > + remote-endpoint = <&ldb_in>;
> > + };
> > + };
> > + };
> > + };
> > --
> > 2.49.0
> >
On Thu, Sep 04, 2025 at 03:14:31PM +0300, Laurentiu Palcu wrote:
> On Thu, Sep 04, 2025 at 09:24:57AM +0200, Krzysztof Kozlowski wrote:
> > On Wed, Sep 03, 2025 at 03:33:22PM +0300, Laurentiu Palcu wrote:
> > > DCIF is the i.MX94 Display Controller Interface which is used to
> > > drive a TFT LCD panel or connects to a display interface depending
> > > on the chip configuration.
> >
> > It looks like you are going to send v5, so:
> >
> > A nit, subject: drop second/last, redundant "bindings for". The
> > "dt-bindings" prefix is already stating that these are bindings.
> > See also:
> > https://elixir.bootlin.com/linux/v6.17-rc3/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
> >
> > Anyway, nothing in the changelog explains dropping tags.
> >
> > I am not going to do the work twice. Write proper changelogs.
>
> Sorry about that. :/ I agree it's frustrating to do the same work
> twice... I admit I was lazy and only wrote a changelog in the
> cover-letter. I will try to add a changelog to each changed patch next
> time.
>
> The r-b tag was dropped in v4 because I removed the QoS functionality until
> I find a better way to handle it.
If drop review tag, need write it at change log and said the reason why
tag dropped.
Frank
> Hence, the 'nxp,blk-ctl' property in
> the binding needed to be dropped as well.
>
> Thanks,
> Laurentiu
>
> >
> > <form letter>
> > This is a friendly reminder during the review process.
> >
> > It looks like you received a tag and forgot to add it.
> >
> > If you do not know the process, here is a short explanation:
> > Please add Acked-by/Reviewed-by/Tested-by tags when posting new
> > versions of patchset, under or above your Signed-off-by tag, unless
> > patch changed significantly (e.g. new properties added to the DT
> > bindings). Tag is "received", when provided in a message replied to you
> > on the mailing list. Tools like b4 can help here. However, there's no
> > need to repost patches *only* to add the tags. The upstream maintainer
> > will do that for tags received on the version they apply.
> >
> > Please read:
> > https://elixir.bootlin.com/linux/v6.12-rc3/source/Documentation/process/submitting-patches.rst#L577
> >
> > If a tag was not added on purpose, please state why and what changed.
> > </form letter>
> >
> > >
> > > Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > > ---
> > > .../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++
> > > 1 file changed, 82 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> > > new file mode 100644
> > > index 0000000000000..54419c589ef74
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> > > @@ -0,0 +1,82 @@
> > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > > +# Copyright 2025 NXP
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: i.MX94 Display Control Interface (DCIF)
> > > +
> > > +maintainers:
> > > + - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> > > +
> > > +description:
> > > + The Display Control Interface(DCIF) is a system master that fetches graphics
> > > + stored in memory and displays them on a TFT LCD panel or connects to a
> > > + display interface depending on the chip configuration.
> > > +
> > > +properties:
> > > + compatible:
> > > + const: nxp,imx94-dcif
> > > +
> > > + reg:
> > > + maxItems: 1
> > > +
> > > + interrupts:
> > > + items:
> > > + - description: CPU domain 0 (controlled by common registers group).
> > > + - description: CPU domain 1 (controlled by background layer registers group).
> > > + - description: CPU domain 2 (controlled by foreground layer registers group).
> > > +
> > > + interrupt-names:
> > > + items:
> > > + - const: common
> > > + - const: bg_layer
> > > + - const: fg_layer
> > > +
> > > + clocks:
> > > + maxItems: 3
> > > +
> > > + clock-names:
> > > + items:
> > > + - const: apb
> > > + - const: axi
> > > + - const: pix
> > > +
> > > + power-domains:
> > > + maxItems: 1
> > > +
> > > + port:
> > > + $ref: /schemas/graph.yaml#/properties/port
> > > + description: Display Pixel Interface(DPI) output port
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > + - |
> > > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > > +
> > > + soc {
> > > + #address-cells = <2>;
> > > + #size-cells = <2>;
> > > +
> > > + display-controller@4b120000 {
> > > + compatible = "nxp,imx94-dcif";
> > > + reg = <0x0 0x4b120000 0x0 0x300000>;
> > > + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
> > > + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
> > > + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> > > + interrupt-names = "common", "bg_layer", "fg_layer";
> > > + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
> > > + clock-names = "apb", "axi", "pix";
> > > + assigned-clocks = <&dispmix_csr 0>;
> > > + assigned-clock-parents = <&ldb_pll_pixel>;
> > > + power-domains = <&scmi_devpd 11>;
> > > +
> > > + port {
> > > + dcif_out: endpoint {
> > > + remote-endpoint = <&ldb_in>;
> > > + };
> > > + };
> > > + };
> > > + };
> > > --
> > > 2.49.0
> > >
On Wed, Sep 03, 2025 at 03:33:22PM +0300, Laurentiu Palcu wrote:
> DCIF is the i.MX94 Display Controller Interface which is used to
> drive a TFT LCD panel or connects to a display interface depending
> on the chip configuration.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> .../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++
> 1 file changed, 82 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> new file mode 100644
> index 0000000000000..54419c589ef74
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2025 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX94 Display Control Interface (DCIF)
> +
> +maintainers:
> + - Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> +
> +description:
> + The Display Control Interface(DCIF) is a system master that fetches graphics
> + stored in memory and displays them on a TFT LCD panel or connects to a
> + display interface depending on the chip configuration.
> +
> +properties:
> + compatible:
> + const: nxp,imx94-dcif
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: CPU domain 0 (controlled by common registers group).
> + - description: CPU domain 1 (controlled by background layer registers group).
> + - description: CPU domain 2 (controlled by foreground layer registers group).
> +
> + interrupt-names:
> + items:
> + - const: common
> + - const: bg_layer
> + - const: fg_layer
> +
> + clocks:
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: apb
> + - const: axi
> + - const: pix
> +
> + power-domains:
> + maxItems: 1
> +
> + port:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Display Pixel Interface(DPI) output port
I still suggest ref to
Documentation/devicetree/bindings/media/video-interfaces.yaml
because it may need set hsync-active, vsync-active, bus-type for some
special TFT pannel in future.
I know driver may not use these now, but binding is descript hardware,
try best to make it complete.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
example needn't exactly copy from dts. you can make "reg" by use 32bit
address, and remove soc layer to keep example simple.
Frank
> +
> + display-controller@4b120000 {
> + compatible = "nxp,imx94-dcif";
> + reg = <0x0 0x4b120000 0x0 0x300000>;
> + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "common", "bg_layer", "fg_layer";
> + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>;
> + clock-names = "apb", "axi", "pix";
> + assigned-clocks = <&dispmix_csr 0>;
> + assigned-clock-parents = <&ldb_pll_pixel>;
> + power-domains = <&scmi_devpd 11>;
> +
> + port {
> + dcif_out: endpoint {
> + remote-endpoint = <&ldb_in>;
> + };
> + };
> + };
> + };
> --
> 2.49.0
>
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