[PATCH v2 0/3] phy: qcom: edp: Add missing refclk clock to x1e80100

Abel Vesa posted 3 patches 4 weeks, 1 day ago
.../devicetree/bindings/phy/qcom,edp-phy.yaml      | 28 +++++++++++++++++++++-
arch/arm64/boot/dts/qcom/x1e80100.dtsi             | 12 ++++++----
drivers/phy/qualcomm/phy-qcom-edp.c                | 18 +++++++-------
3 files changed, 45 insertions(+), 13 deletions(-)
[PATCH v2 0/3] phy: qcom: edp: Add missing refclk clock to x1e80100
Posted by Abel Vesa 4 weeks, 1 day ago
According to documentation, the DP PHY on x1e80100 has another clock
called refclk. Rework the driver to allow different number of clocks.
Fix the dt-bindings schema and add the clock to the DT node as well.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes in v2:
- Fix schema by adding the minItems, as suggested by Krzysztof.
- Use devm_clk_bulk_get_all, as suggested by Konrad.
- Rephrase the commit messages to reflect the flexible number of clocks.
- Link to v1: https://lore.kernel.org/r/20250730-phy-qcom-edp-add-missing-refclk-v1-0-6f78afeadbcf@linaro.org

---
Abel Vesa (3):
      dt-bindings: phy: qcom-edp: Add missing clock for X Elite
      phy: qcom: edp: Make the number of clocks flexible
      arm64: dts: qcom: Add missing TCSR refclk to the DP PHYs

 .../devicetree/bindings/phy/qcom,edp-phy.yaml      | 28 +++++++++++++++++++++-
 arch/arm64/boot/dts/qcom/x1e80100.dtsi             | 12 ++++++----
 drivers/phy/qualcomm/phy-qcom-edp.c                | 18 +++++++-------
 3 files changed, 45 insertions(+), 13 deletions(-)
---
base-commit: 5d50cf9f7cf20a17ac469c20a2e07c29c1f6aab7
change-id: 20250730-phy-qcom-edp-add-missing-refclk-5ab82828f8e7

Best regards,
-- 
Abel Vesa <abel.vesa@linaro.org>