Add device tree binding for the CDCE6214, an Ultra-Low Power Clock
Generator With One PLL, Four Differential Outputs, Two Inputs, and
Internal EEPROM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
.../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++
include/dt-bindings/clock/ti,cdce6214.h | 24 +++
2 files changed, 222 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..4d40b8101fd7e094bb1b79c071e1be2c1fefec23
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
@@ -0,0 +1,198 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: TI CDCE6214 programmable clock generator with PLL
+
+maintainers:
+ - Sascha Hauer <s.hauer@pengutronix.de>
+
+description: >
+ Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs,
+ Two Inputs, and Internal EEPROM
+
+ - CDCE6214: https://www.ti.com/product/CDCE6214
+
+properties:
+ compatible:
+ enum:
+ - ti,cdce6214
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - enum: [ priref, secref ]
+ - const: secref
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+ '#clock-cells':
+ const: 1
+
+patternProperties:
+ '-pins$':
+ type: object
+ additionalProperties: false
+ patternProperties:
+ '^conf':
+ type: object
+ additionalProperties: false
+ $ref: /schemas/pinctrl/pincfg-node.yaml#
+
+ properties:
+ pins:
+ items:
+ enum: [priref, secref, out0, out1, out2, out3, out4 ]
+ io-standard:
+ description: |
+ 1: CMOS
+ 2: LVDS
+ 3: Low-Power HCSL
+ 4: XTAL mode
+ 5: differential
+ enum: [1, 2, 3, 4, 5]
+ $ref: /schemas/types.yaml#/definitions/uint32
+ xo-cload-femtofarad:
+ description: >
+ Load capacity for XO in Femtofarad
+ $ref: /schemas/types.yaml#/definitions/uint32
+ xo-bias-microampere:
+ description: |
+ Bias current setting of the XO
+ $ref: /schemas/types.yaml#/definitions/uint32
+ cmosp-mode:
+ description: |
+ Driving mode for CMOSN output:
+ 1: Low Polarity
+ 2: High Polrity
+ 3: Disable
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 3
+ cmosn-mode:
+ description: |
+ Driving mode for CMOSN output:
+ 1: Low Polarity
+ 2: High Polrity
+ 3: Disable
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maximum: 3
+
+ allOf:
+ - if:
+ properties:
+ pins:
+ contains:
+ const: priref
+ then:
+ properties:
+ io-standard:
+ enum: [ 1, 5 ]
+
+ - if:
+ properties:
+ pins:
+ contains:
+ const: secref
+ then:
+ properties:
+ io-standard:
+ enum: [ 1, 4, 5 ]
+
+ - if:
+ properties:
+ pins:
+ contains:
+ const: out0
+ then:
+ properties:
+ io-standard:
+ enum: [ 1 ]
+
+ - if:
+ properties:
+ pins:
+ contains:
+ enum:
+ - out1
+ - out4
+ then:
+ properties:
+ io-standard:
+ enum: [ 1, 2, 3 ]
+
+ - if:
+ properties:
+ pins:
+ contains:
+ enum:
+ - out2
+ - out3
+ then:
+ properties:
+ io-standard:
+ enum: [ 2, 3 ]
+
+ required:
+ - pins
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - '#clock-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/ti,cdce6214.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clock-generator@67 {
+ compatible = "ti,cdce6214";
+ reg = <0x67>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #clock-cells = <1>;
+ clocks = <&clock_ref25m>;
+ clock-names = "priref";
+
+ cdce6214_pins: cdce6214-pins {
+ conf1 {
+ pins = "secref";
+ io-standard = <CDCE6214_IOSTD_XTAL>;
+ xo-cload-femtofarad = <8100>;
+ xo-bias-microampere = <100>;
+ };
+
+ conf2 {
+ pins = "out1";
+ io-standard = <CDCE6214_IOSTD_CMOS>;
+ cmosp-mode = <CDCE6214_CMOS_MODE_HIGH>;
+ cmosn-mode = <CDCE6214_CMOS_MODE_LOW>;
+ };
+
+ conf3 {
+ pins = "out4";
+ io-standard = <CDCE6214_IOSTD_CMOS>;
+ cmosp-mode = <CDCE6214_CMOS_MODE_HIGH>;
+ cmosn-mode = <CDCE6214_CMOS_MODE_LOW>;
+ };
+ };
+ };
+ };
diff --git a/include/dt-bindings/clock/ti,cdce6214.h b/include/dt-bindings/clock/ti,cdce6214.h
new file mode 100644
index 0000000000000000000000000000000000000000..6d2cc5f01864e70a3fbccbfe20e67899e0d049e4
--- /dev/null
+++ b/include/dt-bindings/clock/ti,cdce6214.h
@@ -0,0 +1,24 @@
+#ifndef _DT_BINDINGS_CLK_TI_CDCE6214_H
+#define _DT_BINDINGS_CLK_TI_CDCE6214_H
+
+/* Clock indices for the clocks provided by the CDCE6214 */
+#define CDCE6214_CLK_OUT0 2
+#define CDCE6214_CLK_OUT1 3
+#define CDCE6214_CLK_OUT2 4
+#define CDCE6214_CLK_OUT3 5
+#define CDCE6214_CLK_OUT4 6
+#define CDCE6214_CLK_PLL 7
+#define CDCE6214_CLK_PSA 8
+#define CDCE6214_CLK_PSB 9
+
+#define CDCE6214_IOSTD_CMOS 1
+#define CDCE6214_IOSTD_LVDS 2
+#define CDCE6214_IOSTD_LP_HCSL 3
+#define CDCE6214_IOSTD_XTAL 4
+#define CDCE6214_IOSTD_DIFF 5
+
+#define CDCE6214_CMOS_MODE_LOW 1
+#define CDCE6214_CMOS_MODE_HIGH 2
+#define CDCE6214_CMOS_MODE_DISABLED 3
+
+#endif /* _DT_BINDINGS_CLK_TI_CDCE6214_H */
--
2.47.2On Wed, Sep 03, 2025 at 03:55:45PM +0200, Sascha Hauer wrote:
> Add device tree binding for the CDCE6214, an Ultra-Low Power Clock
> Generator With One PLL, Four Differential Outputs, Two Inputs, and
> Internal EEPROM.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++
> include/dt-bindings/clock/ti,cdce6214.h | 24 +++
> 2 files changed, 222 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..4d40b8101fd7e094bb1b79c071e1be2c1fefec23
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/ti,cdce6214.yaml
> @@ -0,0 +1,198 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/ti,cdce6214.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: TI CDCE6214 programmable clock generator with PLL
> +
> +maintainers:
> + - Sascha Hauer <s.hauer@pengutronix.de>
> +
> +description: >
> + Ultra-Low Power Clock Generator With One PLL, Four Differential Outputs,
> + Two Inputs, and Internal EEPROM
> +
> + - CDCE6214: https://www.ti.com/product/CDCE6214
> +
> +properties:
> + compatible:
> + enum:
> + - ti,cdce6214
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 2
> +
> + clock-names:
> + minItems: 1
> + items:
> + - enum: [ priref, secref ]
> + - const: secref
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 0
No child nodes with 'reg', so drop #address/size-cells.
> +
> + '#clock-cells':
> + const: 1
> +
> +patternProperties:
> + '-pins$':
> + type: object
> + additionalProperties: false
blank line
> + patternProperties:
> + '^conf':
> + type: object
> + additionalProperties: false
> + $ref: /schemas/pinctrl/pincfg-node.yaml#
> +
> + properties:
> + pins:
> + items:
> + enum: [priref, secref, out0, out1, out2, out3, out4 ]
> + io-standard:
Needs a vendor prefix.
> + description: |
> + 1: CMOS
> + 2: LVDS
> + 3: Low-Power HCSL
> + 4: XTAL mode
> + 5: differential
> + enum: [1, 2, 3, 4, 5]
> + $ref: /schemas/types.yaml#/definitions/uint32
blank line between properties
> + xo-cload-femtofarad:
Needs a vendor prefix
Use standard unit suffixes. It's "-femtofarads".
> + description: >
Don't need '>'.
> + Load capacity for XO in Femtofarad
> + $ref: /schemas/types.yaml#/definitions/uint32
> + xo-bias-microampere:
vendor prefix and unit suffix.
> + description: |
Don't need '|'.
> + Bias current setting of the XO
> + $ref: /schemas/types.yaml#/definitions/uint32
> + cmosp-mode:
Vendor prefix
And so on...
> + description: |
> + Driving mode for CMOSN output:
> + 1: Low Polarity
> + 2: High Polrity
> + 3: Disable
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 3
> + cmosn-mode:
> + description: |
> + Driving mode for CMOSN output:
> + 1: Low Polarity
> + 2: High Polrity
> + 3: Disable
> + $ref: /schemas/types.yaml#/definitions/uint32
> + maximum: 3
> +
> + allOf:
> + - if:
> + properties:
> + pins:
> + contains:
> + const: priref
> + then:
> + properties:
> + io-standard:
> + enum: [ 1, 5 ]
> +
> + - if:
> + properties:
> + pins:
> + contains:
> + const: secref
> + then:
> + properties:
> + io-standard:
> + enum: [ 1, 4, 5 ]
> +
> + - if:
> + properties:
> + pins:
> + contains:
> + const: out0
> + then:
> + properties:
> + io-standard:
> + enum: [ 1 ]
> +
> + - if:
> + properties:
> + pins:
> + contains:
> + enum:
> + - out1
> + - out4
> + then:
> + properties:
> + io-standard:
> + enum: [ 1, 2, 3 ]
> +
> + - if:
> + properties:
> + pins:
> + contains:
> + enum:
> + - out2
> + - out3
> + then:
> + properties:
> + io-standard:
> + enum: [ 2, 3 ]
> +
> + required:
> + - pins
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/ti,cdce6214.h>
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + clock-generator@67 {
> + compatible = "ti,cdce6214";
> + reg = <0x67>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + clocks = <&clock_ref25m>;
> + clock-names = "priref";
> +
> + cdce6214_pins: cdce6214-pins {
> + conf1 {
> + pins = "secref";
> + io-standard = <CDCE6214_IOSTD_XTAL>;
> + xo-cload-femtofarad = <8100>;
> + xo-bias-microampere = <100>;
> + };
> +
> + conf2 {
> + pins = "out1";
> + io-standard = <CDCE6214_IOSTD_CMOS>;
> + cmosp-mode = <CDCE6214_CMOS_MODE_HIGH>;
> + cmosn-mode = <CDCE6214_CMOS_MODE_LOW>;
> + };
> +
> + conf3 {
> + pins = "out4";
> + io-standard = <CDCE6214_IOSTD_CMOS>;
> + cmosp-mode = <CDCE6214_CMOS_MODE_HIGH>;
> + cmosn-mode = <CDCE6214_CMOS_MODE_LOW>;
> + };
> + };
> + };
> + };
> diff --git a/include/dt-bindings/clock/ti,cdce6214.h b/include/dt-bindings/clock/ti,cdce6214.h
> new file mode 100644
> index 0000000000000000000000000000000000000000..6d2cc5f01864e70a3fbccbfe20e67899e0d049e4
> --- /dev/null
> +++ b/include/dt-bindings/clock/ti,cdce6214.h
> @@ -0,0 +1,24 @@
> +#ifndef _DT_BINDINGS_CLK_TI_CDCE6214_H
> +#define _DT_BINDINGS_CLK_TI_CDCE6214_H
> +
> +/* Clock indices for the clocks provided by the CDCE6214 */
> +#define CDCE6214_CLK_OUT0 2
> +#define CDCE6214_CLK_OUT1 3
> +#define CDCE6214_CLK_OUT2 4
> +#define CDCE6214_CLK_OUT3 5
> +#define CDCE6214_CLK_OUT4 6
> +#define CDCE6214_CLK_PLL 7
> +#define CDCE6214_CLK_PSA 8
> +#define CDCE6214_CLK_PSB 9
> +
> +#define CDCE6214_IOSTD_CMOS 1
> +#define CDCE6214_IOSTD_LVDS 2
> +#define CDCE6214_IOSTD_LP_HCSL 3
> +#define CDCE6214_IOSTD_XTAL 4
> +#define CDCE6214_IOSTD_DIFF 5
> +
> +#define CDCE6214_CMOS_MODE_LOW 1
> +#define CDCE6214_CMOS_MODE_HIGH 2
> +#define CDCE6214_CMOS_MODE_DISABLED 3
> +
> +#endif /* _DT_BINDINGS_CLK_TI_CDCE6214_H */
>
> --
> 2.47.2
>
On Wed, Sep 03, 2025 at 03:55:45PM +0200, Sascha Hauer wrote: > Add device tree binding for the CDCE6214, an Ultra-Low Power Clock > Generator With One PLL, Four Differential Outputs, Two Inputs, and > Internal EEPROM. > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > --- > .../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++ > include/dt-bindings/clock/ti,cdce6214.h | 24 +++ > 2 files changed, 222 insertions(+) > I don't understand what is happening here. Patch changed in weird and unexplained way - nothing in the changelog explains dropping SPDX - and does not pass even checkpatch. Best regards, Krzysztof
On Thu, Sep 04, 2025 at 09:18:13AM +0200, Krzysztof Kozlowski wrote: > On Wed, Sep 03, 2025 at 03:55:45PM +0200, Sascha Hauer wrote: > > Add device tree binding for the CDCE6214, an Ultra-Low Power Clock > > Generator With One PLL, Four Differential Outputs, Two Inputs, and > > Internal EEPROM. > > > > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > > --- > > .../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++ > > include/dt-bindings/clock/ti,cdce6214.h | 24 +++ > > 2 files changed, 222 insertions(+) > > > > I don't understand what is happening here. > > Patch changed in weird and unexplained way - nothing in the changelog > explains dropping SPDX - and does not pass even checkpatch. I removed the SPDX by accident, will add it back of course. Other than that, what's weird? Changelog says I now use the pinctrl subsystem to configure pins. OK, that also changes the binding, I could have mentioned that explicitly, sorry for that. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
On 04/09/2025 09:34, Sascha Hauer wrote: > On Thu, Sep 04, 2025 at 09:18:13AM +0200, Krzysztof Kozlowski wrote: >> On Wed, Sep 03, 2025 at 03:55:45PM +0200, Sascha Hauer wrote: >>> Add device tree binding for the CDCE6214, an Ultra-Low Power Clock >>> Generator With One PLL, Four Differential Outputs, Two Inputs, and >>> Internal EEPROM. >>> >>> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> >>> --- >>> .../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++ >>> include/dt-bindings/clock/ti,cdce6214.h | 24 +++ >>> 2 files changed, 222 insertions(+) >>> >> >> I don't understand what is happening here. >> >> Patch changed in weird and unexplained way - nothing in the changelog >> explains dropping SPDX - and does not pass even checkpatch. > > I removed the SPDX by accident, will add it back of course. > > Other than that, what's weird? Changelog says I now use the pinctrl > subsystem to configure pins. OK, that also changes the binding, I could > have mentioned that explicitly, sorry for that. There were four patches before, now there are two and changelog says only about pinctrl to configure pins. That's very vague and you expect me to decipher what changed in the bindings. Best regards, Krzysztof
On Thu, Sep 04, 2025 at 11:43:53AM +0200, Krzysztof Kozlowski wrote: > On 04/09/2025 09:34, Sascha Hauer wrote: > > On Thu, Sep 04, 2025 at 09:18:13AM +0200, Krzysztof Kozlowski wrote: > >> On Wed, Sep 03, 2025 at 03:55:45PM +0200, Sascha Hauer wrote: > >>> Add device tree binding for the CDCE6214, an Ultra-Low Power Clock > >>> Generator With One PLL, Four Differential Outputs, Two Inputs, and > >>> Internal EEPROM. > >>> > >>> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> > >>> --- > >>> .../devicetree/bindings/clock/ti,cdce6214.yaml | 198 +++++++++++++++++++++ > >>> include/dt-bindings/clock/ti,cdce6214.h | 24 +++ > >>> 2 files changed, 222 insertions(+) > >>> > >> > >> I don't understand what is happening here. > >> > >> Patch changed in weird and unexplained way - nothing in the changelog > >> explains dropping SPDX - and does not pass even checkpatch. > > > > I removed the SPDX by accident, will add it back of course. > > > > Other than that, what's weird? Changelog says I now use the pinctrl > > subsystem to configure pins. OK, that also changes the binding, I could > > have mentioned that explicitly, sorry for that. > > There were four patches before, now there are two and changelog says > only about pinctrl to configure pins. That's very vague and you expect > me to decipher what changed in the bindings. In v5 I tried splitting the driver/bindings up into a basic part which and a part which added the pin config stuff in the hope that the first two patches could be applied first. This was not very well received, so I merged it back. I am aware that the binding looks quite different now, but this really goes down to using the pinctrl bindings now. Sascha -- Pengutronix e.K. | | Steuerwalder Str. 21 | http://www.pengutronix.de/ | 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
© 2016 - 2025 Red Hat, Inc.