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[PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment

Christian Bruel posted 1 patch 1 month ago 
drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
[PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment
Posted by Christian Bruel 1 month ago 
The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
numbers in the log2(nr_irqs) bits for the domain.

The problem arises if the base vector (GICV2m base spi) is not aligned with
nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
to be identified.

To fix this, use bitmap_find_next_zero_area_off() instead of
bitmap_find_free_region() to align the initial base vector with nr_irqs.

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
---
Changes in v2:
   (Marc Zyngier)
 - Move align_off definition inside the loop
 - Reworked Commit Message

Changes in v1:
   (Marc Zyngier)
 - Replace the incorrect usage of msi_attrib.multiple with nr_irqs
 - Reworked changelog
---
 drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index 24ef5af569fe..8a3410c2b7b5 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 {
 	msi_alloc_info_t *info = args;
 	struct v2m_data *v2m = NULL, *tmp;
-	int hwirq, offset, i, err = 0;
+	int hwirq, i, err = 0;
+	unsigned long offset;
+	unsigned long align_mask = nr_irqs - 1;
 
 	spin_lock(&v2m_lock);
 	list_for_each_entry(tmp, &v2m_nodes, entry) {
-		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
-						 get_count_order(nr_irqs));
-		if (offset >= 0) {
+		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);
+
+		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,
+							nr_irqs, align_mask, align_off);
+		if (offset < tmp->nr_spis) {
 			v2m = tmp;
+			bitmap_set(v2m->bm, offset, nr_irqs);
 			break;
 		}
 	}
-- 
2.34.1
Re: [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment
Posted by Marc Zyngier 4 weeks ago 
This is actually v3, right?

On Tue, 02 Sep 2025 10:10:45 +0100,
Christian Bruel <christian.bruel@foss.st.com> wrote:
> 
> The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
> low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
> numbers in the log2(nr_irqs) bits for the domain.
> 
> The problem arises if the base vector (GICV2m base spi) is not aligned with
> nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
> vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
> to be identified.
> 
> To fix this, use bitmap_find_next_zero_area_off() instead of
> bitmap_find_free_region() to align the initial base vector with nr_irqs.
> 
> Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
> ---
> Changes in v2:
>    (Marc Zyngier)
>  - Move align_off definition inside the loop
>  - Reworked Commit Message
> 
> Changes in v1:
>    (Marc Zyngier)
>  - Replace the incorrect usage of msi_attrib.multiple with nr_irqs
>  - Reworked changelog
> ---
>  drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
>  1 file changed, 9 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
> index 24ef5af569fe..8a3410c2b7b5 100644
> --- a/drivers/irqchip/irq-gic-v2m.c
> +++ b/drivers/irqchip/irq-gic-v2m.c
> @@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
>  {
>  	msi_alloc_info_t *info = args;
>  	struct v2m_data *v2m = NULL, *tmp;
> -	int hwirq, offset, i, err = 0;
> +	int hwirq, i, err = 0;
> +	unsigned long offset;
> +	unsigned long align_mask = nr_irqs - 1;
>  
>  	spin_lock(&v2m_lock);
>  	list_for_each_entry(tmp, &v2m_nodes, entry) {
> -		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
> -						 get_count_order(nr_irqs));
> -		if (offset >= 0) {
> +		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);
> +
> +		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,
> +							nr_irqs, align_mask, align_off);
> +		if (offset < tmp->nr_spis) {
>  			v2m = tmp;
> +			bitmap_set(v2m->bm, offset, nr_irqs);
>  			break;
>  		}
>  	}

Reviewed-by: Marc Zyngier <maz@kernel.org>

	M.

-- 
Jazz isn't dead. It just smells funny.
Re: [PATCH v2] irqchip: gic-v2m: Handle Multiple MSI base IRQ Alignment
Posted by Christian Bruel 3 weeks, 3 days ago 

On 9/4/25 11:35, Marc Zyngier wrote:
> This is actually v3, right?

yes, I mistakenly used the wrong versioning. The first revised patch 
should haven been v2, not v1.

sorry for the confusion

Christian
[tip: irq/drivers] irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment
Posted by tip-bot2 for Christian Bruel 4 weeks ago 
The following commit has been merged into the irq/drivers branch of tip:

Commit-ID:     2ef3886ce626dcdab0cbc452dbbebc19f57133d8
Gitweb:        https://git.kernel.org/tip/2ef3886ce626dcdab0cbc452dbbebc19f57133d8
Author:        Christian Bruel <christian.bruel@foss.st.com>
AuthorDate:    Tue, 02 Sep 2025 11:10:45 +02:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 04 Sep 2025 14:52:47 +02:00

irqchip/gic-v2m: Handle Multiple MSI base IRQ Alignment

The PCI Local Bus Specification 3.0 (section 6.8.1.6) allows modifying the
low-order bits of the MSI Message DATA register to encode nr_irqs interrupt
numbers in the log2(nr_irqs) bits for the domain.

The problem arises if the base vector (GICV2m base spi) is not aligned with
nr_irqs; in this case, the low-order log2(nr_irqs) bits from the base
vector conflict with the nr_irqs masking, causing the wrong MSI interrupt
to be identified.

To fix this, use bitmap_find_next_zero_area_off() instead of
bitmap_find_free_region() to align the initial base vector with nr_irqs.

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/all/20250902091045.220847-1-christian.bruel@foss.st.com

---
 drivers/irqchip/irq-gic-v2m.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c
index 24ef5af..8a3410c 100644
--- a/drivers/irqchip/irq-gic-v2m.c
+++ b/drivers/irqchip/irq-gic-v2m.c
@@ -153,14 +153,19 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
 {
 	msi_alloc_info_t *info = args;
 	struct v2m_data *v2m = NULL, *tmp;
-	int hwirq, offset, i, err = 0;
+	int hwirq, i, err = 0;
+	unsigned long offset;
+	unsigned long align_mask = nr_irqs - 1;
 
 	spin_lock(&v2m_lock);
 	list_for_each_entry(tmp, &v2m_nodes, entry) {
-		offset = bitmap_find_free_region(tmp->bm, tmp->nr_spis,
-						 get_count_order(nr_irqs));
-		if (offset >= 0) {
+		unsigned long align_off = tmp->spi_start - (tmp->spi_start & ~align_mask);
+
+		offset = bitmap_find_next_zero_area_off(tmp->bm, tmp->nr_spis, 0,
+							nr_irqs, align_mask, align_off);
+		if (offset < tmp->nr_spis) {
 			v2m = tmp;
+			bitmap_set(v2m->bm, offset, nr_irqs);
 			break;
 		}
 	}

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