From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Add a SoC-specific `pcs_ops` pointer in `miic_of_data` to allow
custom phylink PCS callbacks. For RZ/T2H MIIC, implement
`rzt2h_miic_validate` to restrict valid interfaces to RGMII, RMII,
and MII. Assign `rzt2h_miic_phylink_ops` with the new validate
callback to the RZ/T2H MIIC SoC data structure, keeping existing
PCS support intact for other SoCs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/net/pcs/pcs-rzn1-miic.c | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c
index 024562204d7c..ee0805c82141 100644
--- a/drivers/net/pcs/pcs-rzn1-miic.c
+++ b/drivers/net/pcs/pcs-rzn1-miic.c
@@ -209,6 +209,7 @@ struct miic {
* @reset_count: Number of entries in the reset_ids array
* @init_unlock_lock_regs: Flag to indicate if registers need to be unlocked before access
* @miic_write: Function pointer to write a value to a MIIC register
+ * @pcs_ops: PCS operations for the MII converter
*/
struct miic_of_data {
struct modctrl_match *match_table;
@@ -225,6 +226,7 @@ struct miic_of_data {
u8 reset_count;
bool init_unlock_lock_regs;
void (*miic_write)(struct miic *miic, int offset, u32 value);
+ const struct phylink_pcs_ops *pcs_ops;
};
/**
@@ -307,6 +309,17 @@ static void miic_converter_enable(struct miic *miic, int port, int enable)
miic_reg_rmw(miic, MIIC_CONVRST, MIIC_CONVRST_PHYIF_RST(port), val);
}
+static int rzt2h_miic_validate(struct phylink_pcs *pcs, unsigned long *supported,
+ const struct phylink_link_state *state)
+{
+ if (phy_interface_mode_is_rgmii(state->interface) ||
+ state->interface == PHY_INTERFACE_MODE_RMII ||
+ state->interface == PHY_INTERFACE_MODE_MII)
+ return 0;
+
+ return -EINVAL;
+}
+
static int miic_config(struct phylink_pcs *pcs, unsigned int neg_mode,
phy_interface_t interface,
const unsigned long *advertising, bool permit)
@@ -425,6 +438,13 @@ static const struct phylink_pcs_ops miic_phylink_ops = {
.pcs_pre_init = miic_pre_init,
};
+static const struct phylink_pcs_ops rzt2h_miic_phylink_ops = {
+ .pcs_validate = rzt2h_miic_validate,
+ .pcs_config = miic_config,
+ .pcs_link_up = miic_link_up,
+ .pcs_pre_init = miic_pre_init,
+};
+
struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)
{
const struct miic_of_data *of_data;
@@ -476,7 +496,7 @@ struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)
miic_port->miic = miic;
miic_port->port = port - of_data->miic_port_start;
- miic_port->pcs.ops = &miic_phylink_ops;
+ miic_port->pcs.ops = miic->of_data->pcs_ops;
phy_interface_set_rgmii(miic_port->pcs.supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_RMII, miic_port->pcs.supported_interfaces);
@@ -708,6 +728,7 @@ static struct miic_of_data rzn1_miic_of_data = {
.sw_mode_mask = GENMASK(4, 0),
.init_unlock_lock_regs = true,
.miic_write = miic_reg_writel_unlocked,
+ .pcs_ops = &miic_phylink_ops,
};
static struct miic_of_data rzt2h_miic_of_data = {
@@ -724,6 +745,7 @@ static struct miic_of_data rzt2h_miic_of_data = {
.reset_ids = rzt2h_reset_ids,
.reset_count = ARRAY_SIZE(rzt2h_reset_ids),
.miic_write = miic_reg_writel_locked,
+ .pcs_ops = &rzt2h_miic_phylink_ops,
};
static const struct of_device_id miic_of_mtable[] = {
--
2.51.0