Documentation/admin-guide/perf/hisi-pmu.rst | 38 +- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 528 +++++++++++++++---- drivers/perf/hisilicon/hisi_uncore_pmu.c | 5 +- drivers/perf/hisilicon/hisi_uncore_pmu.h | 6 +- 4 files changed, 481 insertions(+), 96 deletions(-)
Support new version of L3C PMU, which supports extended events space
which can be controlled in up to 2 extra address spaces with separate
overflow interrupts. The layout of the control/event registers are kept
the same. The extended events with original ones together cover the
monitoring job of all transactions on L3C.
That's said, the driver supports finer granual statistics of L3 cache
with separated and dedicated PMUs, and a new option `ext` to give a
hint of to which part should perf counting command be delivered.
The extended events is specified with `ext=[1|2]` option for the driver
to distinguish:
perf stat -e hisi_sccl0_l3c0_0/event=<event_id>,ext=<ext>/
Currently only event option using config bit [7, 0]. There's still
plenty unused space. Make ext using config [16, 17] and reserve
bit [15, 8] for event option for future extension.
With the capability of extra counters, number of counters for HiSilicon
uncore PMU could reach up to 24, the usedmap is extended accordingly.
The hw_perf_event::event_base is initialized to the base MMIO address
of the event and will be used for later control, overflow handling and
counts readout.
We still make use of the Uncore PMU framework for handling the events
and interrupt migration on CPU hotplug. The framework's cpuhp callback
will handle the event migration and interrupt migration of orginial
event, if PMU supports extended events then the interrupt of extended
events is migrated to the same CPU choosed by the framework.
A new HID of HISI0215 is used for this version of L3C PMU.
Some necessary refactor is included, allowing the framework to cope with
the new version of driver.
Depends-on: drivers/perf: hisi: Add support for HiSilicon NOC and MN PMU driver
Depends-on: Message-ID: <20250717121727.61057-1-yangyicong@huawei.com>
---
Changes:
v2 -> v3:
- Refactor made for better readability.
- Fixed failure examination in cpu offline callback.
- Some minor reword of documentation, and droped subsection titles as
suggested by Yicong.
- Link to v2: https://lore.kernel.org/all/20250821135049.2010220-1-wangyushan12@huawei.com/
v1 -> v2:
- Don't call disable_irq() and simply return success when there is no
CPU available for irq migration.
- Documentation patch split.
- Fix of a few other issues etc. per Jonathan.
- Link to v1: https://lore.kernel.org/all/20250729153823.2026154-1-wangyushan12@huawei.com/
Yicong Yang (7):
drivers/perf: hisi: Relax the event ID check in the framework
drivers/perf: hisi: Export hisi_uncore_pmu_isr()
drivers/perf: hisi: Simplify the probe process of each L3C PMU version
drivers/perf: hisi: Extract the event filter check of L3C PMU
drivers/perf: hisi: Extend the field of tt_core
drivers/perf: hisi: Refactor the event configuration of L3C PMU
drivers/perf: hisi: Add support for L3C PMU v3
Yushan Wang (2):
Documentation: hisi-pmu: Fix of minor format error
Documentation: hisi-pmu: Add introduction to HiSilicon V3 PMU
Documentation/admin-guide/perf/hisi-pmu.rst | 38 +-
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 528 +++++++++++++++----
drivers/perf/hisilicon/hisi_uncore_pmu.c | 5 +-
drivers/perf/hisilicon/hisi_uncore_pmu.h | 6 +-
4 files changed, 481 insertions(+), 96 deletions(-)
--
2.33.0
On Fri, 29 Aug 2025 18:14:18 +0800, Yushan Wang wrote:
> Support new version of L3C PMU, which supports extended events space
> which can be controlled in up to 2 extra address spaces with separate
> overflow interrupts. The layout of the control/event registers are kept
> the same. The extended events with original ones together cover the
> monitoring job of all transactions on L3C.
>
> That's said, the driver supports finer granual statistics of L3 cache
> with separated and dedicated PMUs, and a new option `ext` to give a
> hint of to which part should perf counting command be delivered.
>
> [...]
Applied to will (for-next/perf), thanks!
But please see my comment on patch 5 regarding the user ABI.
[1/9] drivers/perf: hisi: Relax the event ID check in the framework
https://git.kernel.org/will/c/43de0ac332b8
[2/9] drivers/perf: hisi: Export hisi_uncore_pmu_isr()
https://git.kernel.org/will/c/4550244b53b7
[3/9] drivers/perf: hisi: Simplify the probe process of each L3C PMU version
https://git.kernel.org/will/c/0960e535be54
[4/9] drivers/perf: hisi: Extract the event filter check of L3C PMU
https://git.kernel.org/will/c/2271f1634243
[5/9] drivers/perf: hisi: Extend the field of tt_core
https://git.kernel.org/will/c/ede339ff61c6
[6/9] drivers/perf: hisi: Refactor the event configuration of L3C PMU
https://git.kernel.org/will/c/b3abb08d6f62
[7/9] drivers/perf: hisi: Add support for L3C PMU v3
https://git.kernel.org/will/c/475d94dfe7c6
[8/9] Documentation: hisi-pmu: Fix of minor format error
https://git.kernel.org/will/c/272dd0e5e58d
[9/9] Documentation: hisi-pmu: Add introduction to HiSilicon V3 PMU
https://git.kernel.org/will/c/6d2f913fda56
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
A gentle ping... On 8/29/2025 6:14 PM, Yushan Wang wrote: > Support new version of L3C PMU, which supports extended events space > which can be controlled in up to 2 extra address spaces with separate > overflow interrupts. The layout of the control/event registers are kept > the same. The extended events with original ones together cover the > monitoring job of all transactions on L3C. > > That's said, the driver supports finer granual statistics of L3 cache > with separated and dedicated PMUs, and a new option `ext` to give a > hint of to which part should perf counting command be delivered. > > The extended events is specified with `ext=[1|2]` option for the driver > to distinguish: > > perf stat -e hisi_sccl0_l3c0_0/event=<event_id>,ext=<ext>/ > > Currently only event option using config bit [7, 0]. There's still > plenty unused space. Make ext using config [16, 17] and reserve > bit [15, 8] for event option for future extension. > > With the capability of extra counters, number of counters for HiSilicon > uncore PMU could reach up to 24, the usedmap is extended accordingly. > > The hw_perf_event::event_base is initialized to the base MMIO address > of the event and will be used for later control, overflow handling and > counts readout. > > We still make use of the Uncore PMU framework for handling the events > and interrupt migration on CPU hotplug. The framework's cpuhp callback > will handle the event migration and interrupt migration of orginial > event, if PMU supports extended events then the interrupt of extended > events is migrated to the same CPU choosed by the framework. > > A new HID of HISI0215 is used for this version of L3C PMU. > > Some necessary refactor is included, allowing the framework to cope with > the new version of driver. > > Depends-on: drivers/perf: hisi: Add support for HiSilicon NOC and MN PMU driver > Depends-on: Message-ID: <20250717121727.61057-1-yangyicong@huawei.com> > > --- > > Changes: > > v2 -> v3: > - Refactor made for better readability. > - Fixed failure examination in cpu offline callback. > - Some minor reword of documentation, and droped subsection titles as > suggested by Yicong. > - Link to v2: https://lore.kernel.org/all/20250821135049.2010220-1-wangyushan12@huawei.com/ > > v1 -> v2: > - Don't call disable_irq() and simply return success when there is no > CPU available for irq migration. > - Documentation patch split. > - Fix of a few other issues etc. per Jonathan. > - Link to v1: https://lore.kernel.org/all/20250729153823.2026154-1-wangyushan12@huawei.com/ > > Yicong Yang (7): > drivers/perf: hisi: Relax the event ID check in the framework > drivers/perf: hisi: Export hisi_uncore_pmu_isr() > drivers/perf: hisi: Simplify the probe process of each L3C PMU version > drivers/perf: hisi: Extract the event filter check of L3C PMU > drivers/perf: hisi: Extend the field of tt_core > drivers/perf: hisi: Refactor the event configuration of L3C PMU > drivers/perf: hisi: Add support for L3C PMU v3 > > Yushan Wang (2): > Documentation: hisi-pmu: Fix of minor format error > Documentation: hisi-pmu: Add introduction to HiSilicon V3 PMU > > Documentation/admin-guide/perf/hisi-pmu.rst | 38 +- > drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 528 +++++++++++++++---- > drivers/perf/hisilicon/hisi_uncore_pmu.c | 5 +- > drivers/perf/hisilicon/hisi_uncore_pmu.h | 6 +- > 4 files changed, 481 insertions(+), 96 deletions(-) >
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