Introduce the support for Display clock controller(DISPCC) for
Qualcomm's next gen compute SoC - Glymur.
Device tree changes aren't part of this series and will be posted separately after the
official announcement of the Glymur SoC.
This series has a dependency on the GCC clock controller series posted
https://lore.kernel.org/all/20250825-glymur-clock-controller-v5-v5-0-01b8c8681bcd@oss.qualcomm.com/
Compilation of the series is dependent on which has been added as
dependency.
https://lore.kernel.org/all/20250825-glymur-clock-controller-v5-v5-5-01b8c8681bcd@oss.qualcomm.com/
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
Taniya Das (2):
dt-bindings: clock: Add DISPCC and reset controller for GLYMUR SoC
clk: qcom: dispcc-glymur: Add support for Display Clock Controller
.../bindings/clock/qcom,glymur-dispcc.yaml | 99 +
drivers/clk/qcom/Kconfig | 10 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/dispcc-glymur.c | 1982 ++++++++++++++++++++
include/dt-bindings/clock/qcom,glymur-dispcc.h | 114 ++
5 files changed, 2206 insertions(+)
---
base-commit: 0f4c93f7eb861acab537dbe94441817a270537bf
change-id: 20250829-glymur-disp-clock-controllers-50f728887bae
prerequisite-patch-id: f1872a81e0bdf89b2e26397d8eb6dc1ce7eeac1e
Best regards,
--
Taniya Das <taniya.das@oss.qualcomm.com>