From: Aaron Kling <webgeek1234@gmail.com>

During initialization, the EDVD_COREx_VOLT_FREQ registers for some cores
are still at reset values and not reflecting the actual frequency. This
causes get calls to fail. Set all cores to their respective max
frequency during probe to initialize the registers to working values.

Suggested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 drivers/cpufreq/tegra186-cpufreq.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/cpufreq/tegra186-cpufreq.c b/drivers/cpufreq/tegra186-cpufreq.c
index 6c394b429b6182faffabf222e5af501393dbbba9..3cd42db955c1c705f9774879e34b71ae124e86d2 100644
--- a/drivers/cpufreq/tegra186-cpufreq.c
+++ b/drivers/cpufreq/tegra186-cpufreq.c
@@ -138,7 +138,8 @@ static struct cpufreq_driver tegra186_cpufreq_driver = {
 
 static struct cpufreq_frequency_table *init_vhint_table(
 	struct platform_device *pdev, struct tegra_bpmp *bpmp,
-	struct tegra186_cpufreq_cluster *cluster, unsigned int cluster_id)
+	struct tegra186_cpufreq_cluster *cluster, unsigned int cluster_id,
+	int *max_rate)
 {
 	struct cpufreq_frequency_table *table;
 	struct mrq_cpu_vhint_request req;
@@ -218,6 +219,7 @@ static struct cpufreq_frequency_table *init_vhint_table(
 	}
 
 	table[j].frequency = CPUFREQ_TABLE_END;
+	*max_rate = num_rates - 1;
 
 free:
 	dma_free_coherent(bpmp->dev, sizeof(*data), virt, phys);
@@ -229,7 +231,9 @@ static int tegra186_cpufreq_probe(struct platform_device *pdev)
 {
 	struct tegra186_cpufreq_data *data;
 	struct tegra_bpmp *bpmp;
-	unsigned int i = 0, err;
+	unsigned int i = 0, err, edvd_offset;
+	int max_rate = 0;
+	u32 edvd_val, cpu;
 
 	data = devm_kzalloc(&pdev->dev,
 			    struct_size(data, clusters, TEGRA186_NUM_CLUSTERS),
@@ -252,11 +256,19 @@ static int tegra186_cpufreq_probe(struct platform_device *pdev)
 	for (i = 0; i < TEGRA186_NUM_CLUSTERS; i++) {
 		struct tegra186_cpufreq_cluster *cluster = &data->clusters[i];
 
-		cluster->table = init_vhint_table(pdev, bpmp, cluster, i);
+		cluster->table = init_vhint_table(pdev, bpmp, cluster, i, &max_rate);
 		if (IS_ERR(cluster->table)) {
 			err = PTR_ERR(cluster->table);
 			goto put_bpmp;
 		}
+
+		for (cpu = 0; cpu < ARRAY_SIZE(tegra186_cpus); cpu++) {
+			if (data->cpus[cpu].bpmp_cluster_id == i) {
+				edvd_val = cluster->table[max_rate].driver_data;
+				edvd_offset = data->cpus[cpu].edvd_offset;
+				writel(edvd_val, data->regs + edvd_offset);
+			}
+		}
 	}
 
 	tegra186_cpufreq_driver.driver_data = data;

-- 
2.50.1

On Friday, August 29, 2025 1:57 AM Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@gmail.com>
> 
> During initialization, the EDVD_COREx_VOLT_FREQ registers for some cores
> are still at reset values and not reflecting the actual frequency. This
> causes get calls to fail. Set all cores to their respective max
> frequency during probe to initialize the registers to working values.
> 
> Suggested-by: Mikko Perttunen <mperttunen@nvidia.com>
> Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> ---
>  drivers/cpufreq/tegra186-cpufreq.c | 18 +++++++++++++++---
>  1 file changed, 15 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/cpufreq/tegra186-cpufreq.c
> b/drivers/cpufreq/tegra186-cpufreq.c index
> 6c394b429b6182faffabf222e5af501393dbbba9..3cd42db955c1c705f9774879e34b71ae1
> 24e86d2 100644 --- a/drivers/cpufreq/tegra186-cpufreq.c
> +++ b/drivers/cpufreq/tegra186-cpufreq.c
> @@ -138,7 +138,8 @@ static struct cpufreq_driver tegra186_cpufreq_driver = {
> 
>  static struct cpufreq_frequency_table *init_vhint_table(
>  	struct platform_device *pdev, struct tegra_bpmp *bpmp,
> -	struct tegra186_cpufreq_cluster *cluster, unsigned int cluster_id)
> +	struct tegra186_cpufreq_cluster *cluster, unsigned int cluster_id,
> +	int *max_rate)

'max_rate' sounds like it's the rate itself and not the index. Perhaps have 
init_vhint_table output num_rates and calculate in probe? We should also 
handle the possibility of num_rates being 0. Otherwise looks good to me.

Thanks!
Mikko

>  {
>  	struct cpufreq_frequency_table *table;
>  	struct mrq_cpu_vhint_request req;
> @@ -218,6 +219,7 @@ static struct cpufreq_frequency_table *init_vhint_table(
> }
> 
>  	table[j].frequency = CPUFREQ_TABLE_END;
> +	*max_rate = num_rates - 1;
> 
>  free:
>  	dma_free_coherent(bpmp->dev, sizeof(*data), virt, phys);
> @@ -229,7 +231,9 @@ static int tegra186_cpufreq_probe(struct platform_device
> *pdev) {
>  	struct tegra186_cpufreq_data *data;
>  	struct tegra_bpmp *bpmp;
> -	unsigned int i = 0, err;
> +	unsigned int i = 0, err, edvd_offset;
> +	int max_rate = 0;
> +	u32 edvd_val, cpu;
> 
>  	data = devm_kzalloc(&pdev->dev,
>  			    struct_size(data, clusters, 
TEGRA186_NUM_CLUSTERS),
> @@ -252,11 +256,19 @@ static int tegra186_cpufreq_probe(struct
> platform_device *pdev) for (i = 0; i < TEGRA186_NUM_CLUSTERS; i++) {
>  		struct tegra186_cpufreq_cluster *cluster = &data-
>clusters[i];
> 
> -		cluster->table = init_vhint_table(pdev, bpmp, cluster, i);
> +		cluster->table = init_vhint_table(pdev, bpmp, cluster, i, 
&max_rate);
>  		if (IS_ERR(cluster->table)) {
>  			err = PTR_ERR(cluster->table);
>  			goto put_bpmp;
>  		}
> +
> +		for (cpu = 0; cpu < ARRAY_SIZE(tegra186_cpus); cpu++) {
> +			if (data->cpus[cpu].bpmp_cluster_id == i) {
> +				edvd_val = cluster-
>table[max_rate].driver_data;
> +				edvd_offset = data->cpus[cpu].edvd_offset;
> +				writel(edvd_val, data->regs + 
edvd_offset);
> +			}
> +		}
>  	}
> 
>  	tegra186_cpufreq_driver.driver_data = data;