Add nodes for devices on the HOST1X bus: VI, EPP, ISP, MSENC and TSEC.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
arch/arm/boot/dts/nvidia/tegra114.dtsi | 64 ++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi
index 4caf2073c556..8600a5c52be9 100644
--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi
+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi
@@ -47,6 +47,45 @@ host1x@50000000 {
ranges = <0x54000000 0x54000000 0x01000000>;
+ vi@54080000 {
+ compatible = "nvidia,tegra114-vi";
+ reg = <0x54080000 0x00040000>;
+ interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_VI>;
+ resets = <&tegra_car 20>;
+ reset-names = "vi";
+
+ iommus = <&mc TEGRA_SWGROUP_VI>;
+
+ status = "disabled";
+ };
+
+ epp@540c0000 {
+ compatible = "nvidia,tegra114-epp";
+ reg = <0x540c0000 0x00040000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_EPP>;
+ resets = <&tegra_car TEGRA114_CLK_EPP>;
+ reset-names = "epp";
+
+ iommus = <&mc TEGRA_SWGROUP_EPP>;
+
+ status = "disabled";
+ };
+
+ isp@54100000 {
+ compatible = "nvidia,tegra114-isp";
+ reg = <0x54100000 0x00040000>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_ISP>;
+ resets = <&tegra_car TEGRA114_CLK_ISP>;
+ reset-names = "isp";
+
+ iommus = <&mc TEGRA_SWGROUP_ISP>;
+
+ status = "disabled";
+ };
+
gr2d@54140000 {
compatible = "nvidia,tegra114-gr2d";
reg = <0x54140000 0x00040000>;
@@ -149,6 +188,31 @@ dsib: dsi@54400000 {
#address-cells = <1>;
#size-cells = <0>;
};
+
+ msenc@544c0000 {
+ compatible = "nvidia,tegra114-msenc";
+ reg = <0x544c0000 0x00040000>;
+ interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_MSENC>;
+ resets = <&tegra_car TEGRA114_CLK_MSENC>;
+ reset-names = "mpe";
+
+ iommus = <&mc TEGRA_SWGROUP_MSENC>;
+
+ status = "disabled";
+ };
+
+ tsec@54500000 {
+ compatible = "nvidia,tegra114-tsec";
+ reg = <0x54500000 0x00040000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&tegra_car TEGRA114_CLK_TSEC>;
+ resets = <&tegra_car TEGRA114_CLK_TSEC>;
+
+ iommus = <&mc TEGRA_SWGROUP_TSEC>;
+
+ status = "disabled";
+ };
};
gic: interrupt-controller@50041000 {
--
2.48.1
On Wednesday, August 27, 2025 8:37 PM Svyatoslav Ryhel wrote: > Add nodes for devices on the HOST1X bus: VI, EPP, ISP, MSENC and TSEC. > > Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> > --- > arch/arm/boot/dts/nvidia/tegra114.dtsi | 64 ++++++++++++++++++++++++++ > 1 file changed, 64 insertions(+) > > diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi > index 4caf2073c556..8600a5c52be9 100644 > --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi > +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi > @@ -47,6 +47,45 @@ host1x@50000000 { > > ranges = <0x54000000 0x54000000 0x01000000>; > > + vi@54080000 { > + compatible = "nvidia,tegra114-vi"; > + reg = <0x54080000 0x00040000>; > + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA114_CLK_VI>; > + resets = <&tegra_car 20>; > + reset-names = "vi"; You are adding reset-names here, but in the last patch you're removing it where there's only one reset? > + > + iommus = <&mc TEGRA_SWGROUP_VI>; > + > + status = "disabled"; > + }; > + > + epp@540c0000 { > + compatible = "nvidia,tegra114-epp"; > + reg = <0x540c0000 0x00040000>; > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA114_CLK_EPP>; > + resets = <&tegra_car TEGRA114_CLK_EPP>; > + reset-names = "epp"; > + > + iommus = <&mc TEGRA_SWGROUP_EPP>; > + > + status = "disabled"; > + }; > + > + isp@54100000 { > + compatible = "nvidia,tegra114-isp"; > + reg = <0x54100000 0x00040000>; > + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA114_CLK_ISP>; > + resets = <&tegra_car TEGRA114_CLK_ISP>; > + reset-names = "isp"; > + > + iommus = <&mc TEGRA_SWGROUP_ISP>; > + > + status = "disabled"; > + }; > + > gr2d@54140000 { > compatible = "nvidia,tegra114-gr2d"; > reg = <0x54140000 0x00040000>; > @@ -149,6 +188,31 @@ dsib: dsi@54400000 { > #address-cells = <1>; > #size-cells = <0>; > }; > + > + msenc@544c0000 { > + compatible = "nvidia,tegra114-msenc"; > + reg = <0x544c0000 0x00040000>; > + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA114_CLK_MSENC>; > + resets = <&tegra_car TEGRA114_CLK_MSENC>; > + reset-names = "mpe"; FWIW, I think 'msenc' is the appropriate name to use on Tegra114/Tegra124. I believe MPE is a remnant from older chips, even if some downstream (and I guess upstreaming) naming still uses it. > + > + iommus = <&mc TEGRA_SWGROUP_MSENC>; > + > + status = "disabled"; > + }; > + > + tsec@54500000 { > + compatible = "nvidia,tegra114-tsec"; > + reg = <0x54500000 0x00040000>; > + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&tegra_car TEGRA114_CLK_TSEC>; > + resets = <&tegra_car TEGRA114_CLK_TSEC>; > + > + iommus = <&mc TEGRA_SWGROUP_TSEC>; > + > + status = "disabled"; > + }; > }; > > gic: interrupt-controller@50041000 { >
17 вересня 2025 р. 05:44:42 GMT+03:00, Mikko Perttunen <mperttunen@nvidia.com> пише: >On Wednesday, August 27, 2025 8:37 PM Svyatoslav Ryhel wrote: >> Add nodes for devices on the HOST1X bus: VI, EPP, ISP, MSENC and TSEC. >> >> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> >> --- >> arch/arm/boot/dts/nvidia/tegra114.dtsi | 64 ++++++++++++++++++++++++++ >> 1 file changed, 64 insertions(+) >> >> diff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi >> index 4caf2073c556..8600a5c52be9 100644 >> --- a/arch/arm/boot/dts/nvidia/tegra114.dtsi >> +++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi >> @@ -47,6 +47,45 @@ host1x@50000000 { >> >> ranges = <0x54000000 0x54000000 0x01000000>; >> >> + vi@54080000 { >> + compatible = "nvidia,tegra114-vi"; >> + reg = <0x54080000 0x00040000>; >> + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&tegra_car TEGRA114_CLK_VI>; >> + resets = <&tegra_car 20>; >> + reset-names = "vi"; > >You are adding reset-names here, but in the last patch you're removing it where there's only one reset? I am not "adding" it, it is present in the existing schema and I am making node accordingly. I have no intention to touch schema unless it is absolutely necessary. >> + >> + iommus = <&mc TEGRA_SWGROUP_VI>; >> + >> + status = "disabled"; >> + }; >> + >> + epp@540c0000 { >> + compatible = "nvidia,tegra114-epp"; >> + reg = <0x540c0000 0x00040000>; >> + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&tegra_car TEGRA114_CLK_EPP>; >> + resets = <&tegra_car TEGRA114_CLK_EPP>; >> + reset-names = "epp"; >> + >> + iommus = <&mc TEGRA_SWGROUP_EPP>; >> + >> + status = "disabled"; >> + }; >> + >> + isp@54100000 { >> + compatible = "nvidia,tegra114-isp"; >> + reg = <0x54100000 0x00040000>; >> + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&tegra_car TEGRA114_CLK_ISP>; >> + resets = <&tegra_car TEGRA114_CLK_ISP>; >> + reset-names = "isp"; >> + >> + iommus = <&mc TEGRA_SWGROUP_ISP>; >> + >> + status = "disabled"; >> + }; >> + >> gr2d@54140000 { >> compatible = "nvidia,tegra114-gr2d"; >> reg = <0x54140000 0x00040000>; >> @@ -149,6 +188,31 @@ dsib: dsi@54400000 { >> #address-cells = <1>; >> #size-cells = <0>; >> }; >> + >> + msenc@544c0000 { >> + compatible = "nvidia,tegra114-msenc"; >> + reg = <0x544c0000 0x00040000>; >> + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&tegra_car TEGRA114_CLK_MSENC>; >> + resets = <&tegra_car TEGRA114_CLK_MSENC>; >> + reset-names = "mpe"; > >FWIW, I think 'msenc' is the appropriate name to use on Tegra114/Tegra124. I believe MPE is a remnant from older chips, even if some downstream (and I guess upstreaming) naming still uses it. > Same here, I am making those according to schema and I will not touch it if not neceserry. >> + >> + iommus = <&mc TEGRA_SWGROUP_MSENC>; >> + >> + status = "disabled"; >> + }; >> + >> + tsec@54500000 { >> + compatible = "nvidia,tegra114-tsec"; >> + reg = <0x54500000 0x00040000>; >> + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; >> + clocks = <&tegra_car TEGRA114_CLK_TSEC>; >> + resets = <&tegra_car TEGRA114_CLK_TSEC>; >> + >> + iommus = <&mc TEGRA_SWGROUP_TSEC>; >> + >> + status = "disabled"; >> + }; >> }; >> >> gic: interrupt-controller@50041000 { >> > > >
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