On Wednesday, August 27, 2025 8:37 PM Svyatoslav Ryhel wrote:
> Complete T114 and T124 device trees.
>
> ---
> Changes in v5:
> - dropped clock and reset names from TSEC schema
> - removed clock and reset names from device nodes
>
> Changes in v4:
> - configured tsec schema to cover Tegra210 TSEC as well
> - added required to tsec schema
> - reset-names preserved for consistency with other host1x devices and align with T210
> - added clock-names to align with T210
> - operating-points-v2 check https://lore.kernel.org/lkml/20230119131033.117324-1-krzysztof.kozlowski@linaro.org/
>
> Changes in v3:
> - added tsec description
> - swapped compatible back to use enum
> - clock and reset description dropped, added maxItems: 1
> - reset-names preserved for consistency with other host1x devices
> - dropped interconnects and interconnect-names
> - dropped isp nodename
> - dropped multiple rest names for mpe/msenc
> - dropped tegra114 msenc example
> - fixed reset name in second isp in t124 dtsi
>
> Changes in v2:
> - dropped accepted commits
> - added EPP, MPE and ISP compatibility for T114 and T124
> - added TSEC schema
> ---
>
> Svyatoslav Ryhel (4):
> dt-bindings: display: tegra: document EPP, ISP, MPE and TSEC for
> Tegra114+
> ARM: tegra114: add missing HOST1X device nodes
> ARM: tegra124: add missing HOST1X device nodes
> arm64: tegra210: drop redundant clock and reset names from TSEC node
>
> .../display/tegra/nvidia,tegra114-tsec.yaml | 68 +++++++++++++++++++
> .../display/tegra/nvidia,tegra20-epp.yaml | 14 ++--
> .../display/tegra/nvidia,tegra20-isp.yaml | 15 ++--
> .../display/tegra/nvidia,tegra20-mpe.yaml | 18 +++--
> arch/arm/boot/dts/nvidia/tegra114.dtsi | 64 +++++++++++++++++
> arch/arm/boot/dts/nvidia/tegra124.dtsi | 64 +++++++++++++++++
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 2 -
> 7 files changed, 230 insertions(+), 15 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-tsec.yaml
>
>
Series,
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>