From: Conor Dooley <conor.dooley@microchip.com>

The QiLai implementation of this cache controller uses a cache-sets of
2048, and mandates it in an if/else block - but the definition of the
property only permits 1024. Add 2048 as an option, and deny its use
outside of the QiLai.

Fixes: 51b081cdb9237 ("dt-bindings: cache: add QiLai compatible to ax45mp")
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
CC: Conor Dooley <conor@kernel.org>
CC: Rob Herring <robh@kernel.org>
CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
CC: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
CC: Ben Zong-You Xie <ben717@andestech.com>
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
---
 .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml   | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
index 4de5bb2e5f246..b135ffa4ab6b8 100644
--- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
+++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
@@ -47,7 +47,7 @@ properties:
     const: 2
 
   cache-sets:
-    const: 1024
+    enum: [1024, 2048]
 
   cache-size:
     enum: [131072, 262144, 524288, 1048576, 2097152]
@@ -81,6 +81,10 @@ allOf:
           const: 2048
         cache-size:
           const: 2097152
+    else:
+      properties:
+        cache-sets:
+          const: 1024
 
 examples:
   - |
-- 
2.47.2

From: Conor Dooley <conor.dooley@microchip.com>

On Wed, 27 Aug 2025 19:03:44 +0100, Conor Dooley wrote:
> The QiLai implementation of this cache controller uses a cache-sets of
> 2048, and mandates it in an if/else block - but the definition of the
> property only permits 1024. Add 2048 as an option, and deny its use
> outside of the QiLai.
> 
> 

Applied to riscv-cache-for-next, thanks!

[1/1] dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets value
      https://git.kernel.org/conor/c/4fab69dd1fa5

Thanks,
Conor.

On Wed, Aug 27, 2025 at 07:03:44PM +0100, Conor Dooley wrote:
> [EXTERNAL MAIL]
> 
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The QiLai implementation of this cache controller uses a cache-sets of
> 2048, and mandates it in an if/else block - but the definition of the
> property only permits 1024. Add 2048 as an option, and deny its use
> outside of the QiLai.
> 
> Fixes: 51b081cdb9237 ("dt-bindings: cache: add QiLai compatible to ax45mp")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

Reviewed-by: Ben Zong-You Xie <ben717@andestech.com>

Best regards,
Ben