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[PATCH] LoongArch: BPF: Optimize sign-extention mov instructions

Tiezhu Yang posted 1 patch 1 month, 1 week ago 
arch/loongarch/net/bpf_jit.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
[PATCH] LoongArch: BPF: Optimize sign-extention mov instructions
Posted by Tiezhu Yang 1 month, 1 week ago 
For 8-bit and 16-bit sign-extention mov instructions, it can use the native
instructions ext.w.b and ext.w.h directly, no need to use the temporary t1
register, just remove the redundant operations.

Here are the test results:

  # modprobe test_bpf test_range=81,84
  # dmesg -t | tail -5
  test_bpf: #81 ALU_MOVSX | BPF_B jited:1 5 PASS
  test_bpf: #82 ALU_MOVSX | BPF_H jited:1 5 PASS
  test_bpf: #83 ALU64_MOVSX | BPF_B jited:1 5 PASS
  test_bpf: #84 ALU64_MOVSX | BPF_H jited:1 5 PASS
  test_bpf: Summary: 4 PASSED, 0 FAILED, [4/4 JIT'ed]

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 arch/loongarch/net/bpf_jit.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c
index abfdb6bb5c38..7072db18c6cd 100644
--- a/arch/loongarch/net/bpf_jit.c
+++ b/arch/loongarch/net/bpf_jit.c
@@ -527,13 +527,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
 			emit_zext_32(ctx, dst, is32);
 			break;
 		case 8:
-			move_reg(ctx, t1, src);
-			emit_insn(ctx, extwb, dst, t1);
+			emit_insn(ctx, extwb, dst, src);
 			emit_zext_32(ctx, dst, is32);
 			break;
 		case 16:
-			move_reg(ctx, t1, src);
-			emit_insn(ctx, extwh, dst, t1);
+			emit_insn(ctx, extwh, dst, src);
 			emit_zext_32(ctx, dst, is32);
 			break;
 		case 32:
-- 
2.42.0
Re: [PATCH] LoongArch: BPF: Optimize sign-extention mov instructions
Posted by Hengqi Chen 1 month, 1 week ago 
On Tue, Aug 26, 2025 at 2:49 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
>
> For 8-bit and 16-bit sign-extention mov instructions, it can use the native
> instructions ext.w.b and ext.w.h directly, no need to use the temporary t1
> register, just remove the redundant operations.
>
> Here are the test results:
>
>   # modprobe test_bpf test_range=81,84
>   # dmesg -t | tail -5
>   test_bpf: #81 ALU_MOVSX | BPF_B jited:1 5 PASS
>   test_bpf: #82 ALU_MOVSX | BPF_H jited:1 5 PASS
>   test_bpf: #83 ALU64_MOVSX | BPF_B jited:1 5 PASS
>   test_bpf: #84 ALU64_MOVSX | BPF_H jited:1 5 PASS
>   test_bpf: Summary: 4 PASSED, 0 FAILED, [4/4 JIT'ed]
>
> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> ---
>  arch/loongarch/net/bpf_jit.c | 6 ++----
>  1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c
> index abfdb6bb5c38..7072db18c6cd 100644
> --- a/arch/loongarch/net/bpf_jit.c
> +++ b/arch/loongarch/net/bpf_jit.c
> @@ -527,13 +527,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
>                         emit_zext_32(ctx, dst, is32);
>                         break;
>                 case 8:
> -                       move_reg(ctx, t1, src);
> -                       emit_insn(ctx, extwb, dst, t1);
> +                       emit_insn(ctx, extwb, dst, src);
>                         emit_zext_32(ctx, dst, is32);
>                         break;
>                 case 16:
> -                       move_reg(ctx, t1, src);
> -                       emit_insn(ctx, extwh, dst, t1);
> +                       emit_insn(ctx, extwh, dst, src);
>                         emit_zext_32(ctx, dst, is32);
>                         break;
>                 case 32:
> --

Acked-by: Hengqi Chen <hengqi.chen@gmail.com>

> 2.42.0
>
Re: [PATCH] LoongArch: BPF: Optimize sign-extention mov instructions
Posted by Huacai Chen 1 month, 1 week ago 
Applied, thanks.

Huacai

On Wed, Aug 27, 2025 at 9:27 AM Hengqi Chen <hengqi.chen@gmail.com> wrote:
>
> On Tue, Aug 26, 2025 at 2:49 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote:
> >
> > For 8-bit and 16-bit sign-extention mov instructions, it can use the native
> > instructions ext.w.b and ext.w.h directly, no need to use the temporary t1
> > register, just remove the redundant operations.
> >
> > Here are the test results:
> >
> >   # modprobe test_bpf test_range=81,84
> >   # dmesg -t | tail -5
> >   test_bpf: #81 ALU_MOVSX | BPF_B jited:1 5 PASS
> >   test_bpf: #82 ALU_MOVSX | BPF_H jited:1 5 PASS
> >   test_bpf: #83 ALU64_MOVSX | BPF_B jited:1 5 PASS
> >   test_bpf: #84 ALU64_MOVSX | BPF_H jited:1 5 PASS
> >   test_bpf: Summary: 4 PASSED, 0 FAILED, [4/4 JIT'ed]
> >
> > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
> > ---
> >  arch/loongarch/net/bpf_jit.c | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c
> > index abfdb6bb5c38..7072db18c6cd 100644
> > --- a/arch/loongarch/net/bpf_jit.c
> > +++ b/arch/loongarch/net/bpf_jit.c
> > @@ -527,13 +527,11 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext
> >                         emit_zext_32(ctx, dst, is32);
> >                         break;
> >                 case 8:
> > -                       move_reg(ctx, t1, src);
> > -                       emit_insn(ctx, extwb, dst, t1);
> > +                       emit_insn(ctx, extwb, dst, src);
> >                         emit_zext_32(ctx, dst, is32);
> >                         break;
> >                 case 16:
> > -                       move_reg(ctx, t1, src);
> > -                       emit_insn(ctx, extwh, dst, t1);
> > +                       emit_insn(ctx, extwh, dst, src);
> >                         emit_zext_32(ctx, dst, is32);
> >                         break;
> >                 case 32:
> > --
>
> Acked-by: Hengqi Chen <hengqi.chen@gmail.com>
>
> > 2.42.0
> >

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