Describe PCIe controller and PHY. Also add required system resources like
regulators, clocks, interrupts and registers configuration for PCIe.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
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Changes in v2:
- Follow the x1e80100.dtsi pcie node description (Konrad).
- define phy & perst, wake in port node as per latest bindings.
- Add check in the driver to parse only pcie child nodes.
- Added acked by tag(Rob).
- Removed dtbinding and phy driver patches as they got applied.
- Link to v1: https://lore.kernel.org/r/20250809-pakala-v1-0-abf1c416dbaa@oss.qualcomm.com
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Krishna Chaitanya Chundru (3):
dt-bindings: PCI: qcom,pcie-sm8550: Add SM8750 compatible
arm64: dts: qcom: sm8750: Add PCIe PHY and controller node
PCI: qcom: Restrict port parsing only to pci child nodes
.../devicetree/bindings/pci/qcom,pcie-sm8550.yaml | 1 +
arch/arm64/boot/dts/qcom/sm8750.dtsi | 180 ++++++++++++++++++++-
drivers/pci/controller/dwc/pcie-qcom.c | 2 +
3 files changed, 182 insertions(+), 1 deletion(-)
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base-commit: b6add54ba61890450fa54fd9327d10fdfd653439
change-id: 20250809-pakala-25a7c1ddba85
Best regards,
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Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>