1. Patchew
  2. linux
  3. [PATCH 0/3] Add exynosautov920 thermal support
  4. View patch

[PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding

Shin Son posted 3 patches 1 month, 1 week ago
There is a newer version of this series
[PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding
Posted by Shin Son 1 month, 1 week ago 
Create a new exynosautov920-tmu.dtsi describing new TMU hardware
and include it from exynosautov920.dtsi.

The exynosautov920-tmu node uses the misc clock as its source
and exposes two new DT properties:

- tmu-name: identifies the TMU variant for sensor skipping
- sensor-index-ranges: defines valid sensor index ranges for the bitmap

This TMU binding defines six thermal zones with a critical trip point
at 125 degrees:

tmu_top : cpucl0-left, cpucl1
tmu_sub0: cpucl0-right, cpucl2
tmu_sub1: g3d, npu

Signed-off-by: Shin Son <shin.son@samsung.com>
---
 .../boot/dts/exynos/exynosautov920-tmu.dtsi   | 92 +++++++++++++++++++
 .../arm64/boot/dts/exynos/exynosautov920.dtsi | 34 +++++++
 2 files changed, 126 insertions(+)
 create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
new file mode 100644
index 000000000000..fa88e9bcdfec
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung's ExynosAuto920 TMU configurations device tree source
+ *
+ * Copyright (c) 2020 Samsung Electronics Co., Ltd.
+ *
+ * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are listed as
+ * device tree nodes in this file.
+ */
+
+/ {
+	thermal-zones {
+		cpucl0left-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_top 0>;
+
+			trips {
+				cpucl0_0_critical: cpucl0-0-critical {
+					temperature = <125000>;	/* millicelsius */
+					hysteresis = <0>;	/* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+		cpucl0right-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_sub0 0>;
+
+			trips {
+				cpucl0_1_critical: cpucl0-1-critical {
+					temperature = <125000>;	/* millicelsius */
+					hysteresis = <0>;	/* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+		cpucl1-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_top 1>;
+
+			trips {
+				cpucl1_critical: cpucl1-critical {
+					temperature = <125000>;	/* millicelsius */
+					hysteresis = <0>;	/* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+		cpucl2-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_sub0 1>;
+
+			trips {
+				cpucl2_critical: cpucl2-critical {
+					temperature = <125000>;	/* millicelsius */
+					hysteresis = <0>;	/* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+		g3d-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_sub1 0>;
+
+			trips {
+				g3d_critical: g3d-critical {
+					temperature = <125000>; /* millicelsius */
+					hysteresis = <0>; /* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+		npu-thermal {
+			polling-delay-passive = <0>;
+			polling-delay = <0>;
+			thermal-sensors = <&tmuctrl_sub1 1>;
+
+			trips {
+				npu_critical: npu-critical {
+					temperature = <125000>; /* millicelsius */
+					hysteresis = <0>; /* millicelsius */
+					type = "critical";
+				};
+			};
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index 0fdf2062930a..a4ff941f8e43 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -330,6 +330,39 @@ watchdog_cl1: watchdog@10070000 {
 			samsung,cluster-index = <1>;
 		};
 
+		tmuctrl_top: tmutop-thermal@100a0000 {
+			compatible = "samsung,exynosautov920-tmu";
+			reg = <0x100A0000 0x1000>;
+			interrupts = <GIC_SPI 951 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+			clock-names = "tmu_apbif";
+			#thermal-sensor-cells = <1>;
+			tmu-name = "TMU_TOP";
+			sensor-index-ranges = <1 12>;
+		};
+
+		tmuctrl_sub0: tmusub0-thermal@100b0000 {
+			compatible = "samsung,exynosautov920-tmu";
+			reg = <0x100B0000 0x1000>;
+			interrupts = <GIC_SPI 950 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+			clock-names = "tmu_apbif";
+			#thermal-sensor-cells = <1>;
+			tmu-name = "TMU_SUB0";
+			sensor-index-ranges = <3 10>;
+		};
+
+		tmuctrl_sub1: tmusub1-thermal@100c0000 {
+			compatible = "samsung,exynosautov920-tmu";
+			reg = <0x100C0000 0x1000>;
+			interrupts = <GIC_SPI 949 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu_misc CLK_DOUT_MISC_NOCP>;
+			clock-names = "tmu_apbif";
+			#thermal-sensor-cells = <1>;
+			tmu-name = "TMU_SUB1";
+			sensor-index-ranges = <1 7>;
+		};
+
 		gic: interrupt-controller@10400000 {
 			compatible = "arm,gic-v3";
 			#interrupt-cells = <3>;
@@ -1507,3 +1540,4 @@ timer {
 };
 
 #include "exynosautov920-pinctrl.dtsi"
+#include "exynosautov920-tmu.dtsi"
-- 
2.50.1
Re: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding
Posted by Krzysztof Kozlowski 1 month ago 
On 25/08/2025 08:49, Shin Son wrote:
> Create a new exynosautov920-tmu.dtsi describing new TMU hardware
> and include it from exynosautov920.dtsi.
> 
> The exynosautov920-tmu node uses the misc clock as its source
> and exposes two new DT properties:
> 
> - tmu-name: identifies the TMU variant for sensor skipping
> - sensor-index-ranges: defines valid sensor index ranges for the bitmap
> 
> This TMU binding defines six thermal zones with a critical trip point
> at 125 degrees:
> 
> tmu_top : cpucl0-left, cpucl1
> tmu_sub0: cpucl0-right, cpucl2
> tmu_sub1: g3d, npu
> 
> Signed-off-by: Shin Son <shin.son@samsung.com>
> ---
>  .../boot/dts/exynos/exynosautov920-tmu.dtsi   | 92 +++++++++++++++++++
>  .../arm64/boot/dts/exynos/exynosautov920.dtsi | 34 +++++++
>  2 files changed, 126 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> 
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> new file mode 100644
> index 000000000000..fa88e9bcdfec
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung's ExynosAuto920 TMU configurations device tree source
> + *
> + * Copyright (c) 2020 Samsung Electronics Co., Ltd.
> + *
> + * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are listed as
> + * device tree nodes in this file.
> + */
> +
> +/ {
> +	thermal-zones {
> +		cpucl0left-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_top 0>;
> +
> +			trips {
> +				cpucl0_0_critical: cpucl0-0-critical {
> +					temperature = <125000>;	/* millicelsius */
> +					hysteresis = <0>;	/* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};

Missing blank line.

> +		cpucl0right-thermal {

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.

> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_sub0 0>;
> +
> +			trips {
> +				cpucl0_1_critical: cpucl0-1-critical {
> +					temperature = <125000>;	/* millicelsius */
> +					hysteresis = <0>;	/* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};
> +		cpucl1-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_top 1>;
> +
> +			trips {
> +				cpucl1_critical: cpucl1-critical {
> +					temperature = <125000>;	/* millicelsius */
> +					hysteresis = <0>;	/* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};
> +		cpucl2-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_sub0 1>;
> +
> +			trips {
> +				cpucl2_critical: cpucl2-critical {
> +					temperature = <125000>;	/* millicelsius */
> +					hysteresis = <0>;	/* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};
> +		g3d-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_sub1 0>;
> +
> +			trips {
> +				g3d_critical: g3d-critical {
> +					temperature = <125000>; /* millicelsius */
> +					hysteresis = <0>; /* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};
> +		npu-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&tmuctrl_sub1 1>;
> +
> +			trips {
> +				npu_critical: npu-critical {
> +					temperature = <125000>; /* millicelsius */
> +					hysteresis = <0>; /* millicelsius */
> +					type = "critical";
> +				};
> +			};
> +		};
> +	};
> +};
> diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> index 0fdf2062930a..a4ff941f8e43 100644
> --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> @@ -330,6 +330,39 @@ watchdog_cl1: watchdog@10070000 {
>  			samsung,cluster-index = <1>;
>  		};
>  
> +		tmuctrl_top: tmutop-thermal@100a0000 {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
If you cannot find a name matching your device, please check in kernel
sources for similar cases or you can grow the spec (via pull request to
DT spec repo).


Best regards,
Krzysztof
RE: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding
Posted by 손신 1 month ago 
Hello Krzysztof Kozlowski,

> -----Original Message-----
> From: Krzysztof Kozlowski [mailto:krzk@kernel.org]
> Sent: Saturday, August 30, 2025 6:08 PM
> To: Shin Son <shin.son@samsung.com>; Bartlomiej Zolnierkiewicz
> <bzolnier@gmail.com>; Rafael J . Wysocki <rafael@kernel.org>; Daniel
> Lezcano <daniel.lezcano@linaro.org>; Zhang Rui <rui.zhang@intel.com>;
> Lukasz Luba <lukasz.luba@arm.com>; Rob Herring <robh@kernel.org>; Conor
> Dooley <conor+dt@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>
> Cc: linux-pm@vger.kernel.org; linux-samsung-soc@vger.kernel.org;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux-
> kernel@vger.kernel.org
> Subject: Re: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware
> binding
> 
> On 25/08/2025 08:49, Shin Son wrote:
> > Create a new exynosautov920-tmu.dtsi describing new TMU hardware and
> > include it from exynosautov920.dtsi.
> >
> > The exynosautov920-tmu node uses the misc clock as its source and
> > exposes two new DT properties:
> >
> > - tmu-name: identifies the TMU variant for sensor skipping
> > - sensor-index-ranges: defines valid sensor index ranges for the
> > bitmap
> >
> > This TMU binding defines six thermal zones with a critical trip point
> > at 125 degrees:
> >
> > tmu_top : cpucl0-left, cpucl1
> > tmu_sub0: cpucl0-right, cpucl2
> > tmu_sub1: g3d, npu
> >
> > Signed-off-by: Shin Son <shin.son@samsung.com>
> > ---
> >  .../boot/dts/exynos/exynosautov920-tmu.dtsi   | 92 +++++++++++++++++++
> >  .../arm64/boot/dts/exynos/exynosautov920.dtsi | 34 +++++++
> >  2 files changed, 126 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> > new file mode 100644
> > index 000000000000..fa88e9bcdfec
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov920-tmu.dtsi
> > @@ -0,0 +1,92 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Samsung's ExynosAuto920 TMU configurations device tree source
> > + *
> > + * Copyright (c) 2020 Samsung Electronics Co., Ltd.
> > + *
> > + * Samsung's ExynosAuto920 SoC TMU(Thermal Managemenut Unit) are
> > +listed as
> > + * device tree nodes in this file.
> > + */
> > +
> > +/ {
> > +	thermal-zones {
> > +		cpucl0left-thermal {
> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_top 0>;
> > +
> > +			trips {
> > +				cpucl0_0_critical: cpucl0-0-critical {
> > +					temperature = <125000>;	/*
> millicelsius */
> > +					hysteresis = <0>;	/* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> 
> Missing blank line.

I'll remove the blank line.

> 
> > +		cpucl0right-thermal {
> 
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-
> schema.rst or https://protect2.fireeye.com/v1/url?k=004c918d-61c784be-
> 004d1ac2-000babff9bb7-06e007e7dc12091d&q=1&e=d6a22592-2d45-41f5-b737-
> a90830cceaeb&u=https%3A%2F%2Fwww.linaro.org%2Fblog%2Ftips-and-tricks-for-
> validating-devicetree-sources-with-the-devicetree-schema%2F
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on distro
> packages for dtschema and be sure you are using the latest released
> dtschema.
> 

Actually, I also updated both dtschema and yamllint and ran "make CHECK_DTBS=y W=1 exynos/exynosautov920-sadk.dtb", but no other issues were detected.
I assume that the problem you mentioned about "cpucl0right-thermal" might be related to the regex.
Based on this assumption, I'll shorten the node name and include the change in the next version.
If that is not the case, I'll investigate it further from another angle.

> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_sub0 0>;
> > +
> > +			trips {
> > +				cpucl0_1_critical: cpucl0-1-critical {
> > +					temperature = <125000>;	/*
> millicelsius */
> > +					hysteresis = <0>;	/* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> > +		cpucl1-thermal {
> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_top 1>;
> > +
> > +			trips {
> > +				cpucl1_critical: cpucl1-critical {
> > +					temperature = <125000>;	/*
> millicelsius */
> > +					hysteresis = <0>;	/* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> > +		cpucl2-thermal {
> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_sub0 1>;
> > +
> > +			trips {
> > +				cpucl2_critical: cpucl2-critical {
> > +					temperature = <125000>;	/*
> millicelsius */
> > +					hysteresis = <0>;	/* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> > +		g3d-thermal {
> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_sub1 0>;
> > +
> > +			trips {
> > +				g3d_critical: g3d-critical {
> > +					temperature = <125000>; /* millicelsius
> */
> > +					hysteresis = <0>; /* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> > +		npu-thermal {
> > +			polling-delay-passive = <0>;
> > +			polling-delay = <0>;
> > +			thermal-sensors = <&tmuctrl_sub1 1>;
> > +
> > +			trips {
> > +				npu_critical: npu-critical {
> > +					temperature = <125000>; /* millicelsius
> */
> > +					hysteresis = <0>; /* millicelsius */
> > +					type = "critical";
> > +				};
> > +			};
> > +		};
> > +	};
> > +};
> > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > index 0fdf2062930a..a4ff941f8e43 100644
> > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
> > @@ -330,6 +330,39 @@ watchdog_cl1: watchdog@10070000 {
> >  			samsung,cluster-index = <1>;
> >  		};
> >
> > +		tmuctrl_top: tmutop-thermal@100a0000 {
> 
> Node names should be generic. See also an explanation and list of examples
> (not exhaustive) in DT specification:
> https://protect2.fireeye.com/v1/url?k=fbd86cff-9a5379cc-fbd9e7b0-
> 000babff9bb7-cfe00d75a7b0cdcf&q=1&e=d6a22592-2d45-41f5-b737-
> a90830cceaeb&u=https%3A%2F%2Fdevicetree-
> specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devicetree-
> basics.html%23generic-names-recommendation
> If you cannot find a name matching your device, please check in kernel
> sources for similar cases or you can grow the spec (via pull request to DT
> spec repo).
> 
> 
> Best regards,
> Krzysztof

Okay, I'll change the node names(e.g., tmutop-thermal ...) to be more generic.
After reviewing the existing kernel source, I noticed that nodes are written in the form of tmu@..., so I will adopt that convention.
These changes will be included in the next version. Thank you.
Re: [PATCH 3/3] arm64: dts: exynosautov920: Add tmu hardware binding
Posted by Krzysztof Kozlowski 1 month ago 
On 02/09/2025 11:06, 손신 wrote:
> 
>>
>>> +		cpucl0right-thermal {
>>
>> It does not look like you tested the DTS against bindings. Please run
>> `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-
>> schema.rst or https://protect2.fireeye.com/v1/url?k=004c918d-61c784be-
>> 004d1ac2-000babff9bb7-06e007e7dc12091d&q=1&e=d6a22592-2d45-41f5-b737-
>> a90830cceaeb&u=https%3A%2F%2Fwww.linaro.org%2Fblog%2Ftips-and-tricks-for-
>> validating-devicetree-sources-with-the-devicetree-schema%2F
>> for instructions).
>> Maybe you need to update your dtschema and yamllint. Don't rely on distro
>> packages for dtschema and be sure you are using the latest released
>> dtschema.
>>
> 
> Actually, I also updated both dtschema and yamllint and ran "make CHECK_DTBS=y W=1 exynos/exynosautov920-sadk.dtb", but no other issues were detected.

Thanks

> I assume that the problem you mentioned about "cpucl0right-thermal" might be related to the regex.

You actually fit exactly in the limit.

Best regards,
Krzysztof

Patchew 2.1-devel-b67e4c2

© 2016 - 2025 Red Hat, Inc.