On 8/23/25 11:08 AM, Beleswar Padhi wrote:
> Remote Processors defined in top-level J7200 SoC dtsi files are
> incomplete without the memory carveouts and mailbox assignments which
> are only known at board integration level.
>
> Therefore, disable the remote processors at SoC level and enable them at
> board level where above information is available.
>
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
> ---
Small comment on the $subject, these all seem to be specific to the R5F
cores, the other remote processors are already enabled at the board level.
Suggest: "Enable R5F remote processors at board level"
Otherwise this looks good to me, same for patches 2-12 in this series
so feel free to add my ACK to those 12 patches when you spin v3,
Acked-by: Andrew Davis <afd@ti.com>
> v2: Changelog:
> 1. None
>
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-2-b-padhi@ti.com/
>
> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 3 +++
> arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 9 +++++++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 5ce5f0a3d6f5..628ff89dd72f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1516,6 +1516,7 @@ main_r5fss0: r5fss@5c00000 {
> ranges = <0x5c00000 0x00 0x5c00000 0x20000>,
> <0x5d00000 0x00 0x5d00000 0x20000>;
> power-domains = <&k3_pds 243 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> main_r5fss0_core0: r5f@5c00000 {
> compatible = "ti,j7200-r5f";
> @@ -1530,6 +1531,7 @@ main_r5fss0_core0: r5f@5c00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> main_r5fss0_core1: r5f@5d00000 {
> @@ -1545,6 +1547,7 @@ main_r5fss0_core1: r5f@5d00000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 56ab144fea07..692c4745040e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -612,6 +612,7 @@ mcu_r5fss0: r5fss@41000000 {
> ranges = <0x41000000 0x00 0x41000000 0x20000>,
> <0x41400000 0x00 0x41400000 0x20000>;
> power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
> + status = "disabled";
>
> mcu_r5fss0_core0: r5f@41000000 {
> compatible = "ti,j7200-r5f";
> @@ -626,6 +627,7 @@ mcu_r5fss0_core0: r5f@41000000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
>
> mcu_r5fss0_core1: r5f@41400000 {
> @@ -641,6 +643,7 @@ mcu_r5fss0_core1: r5f@41400000 {
> ti,atcm-enable = <1>;
> ti,btcm-enable = <1>;
> ti,loczrama = <1>;
> + status = "disabled";
> };
> };
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> index 291ab9bb414d..90befcdc8d08 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
> @@ -254,20 +254,27 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
> };
> };
>
> +&mcu_r5fss0 {
> + status = "okay";
> +};
> +
> &mcu_r5fss0_core0 {
> mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
> memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> <&mcu_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &mcu_r5fss0_core1 {
> mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
> memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
> <&mcu_r5fss0_core1_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0 {
> ti,cluster-mode = <0>;
> + status = "okay";
> };
>
> /* Timers are used by Remoteproc firmware */
> @@ -287,12 +294,14 @@ &main_r5fss0_core0 {
> mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
> memory-region = <&main_r5fss0_core0_dma_memory_region>,
> <&main_r5fss0_core0_memory_region>;
> + status = "okay";
> };
>
> &main_r5fss0_core1 {
> mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
> memory-region = <&main_r5fss0_core1_dma_memory_region>,
> <&main_r5fss0_core1_memory_region>;
> + status = "okay";
> };
>
> &main_i2c0 {