[PATCH v2 18/33] arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC Firmware

Beleswar Padhi posted 33 patches 1 month, 1 week ago
There is a newer version of this series
[PATCH v2 18/33] arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC Firmware
Posted by Beleswar Padhi 1 month, 1 week ago
The k3-am64-phycore SoM enables all R5F and M4F remote processors.
Reserve the MAIN domain timers that are used by R5F remote
processors for ticks to avoid rproc crashes. This config aligns with
other AM64 boards and can be refactored out later.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
---
Cc: Wadim Egorov <w.egorov@phytec.de>
Cc: Matt McKee <mmckee@phytec.com>
Cc: Garrett Giordano <ggiordano@phytec.com>
Cc: Nathan Morrisson <nmorrisson@phytec.com>
Cc: John Ma <jma@phytec.com>
Cc: Logan Bristol <logan.bristol@utexas.edu>
Requesting for review/test of this patch.

v2: Changelog:
1. Re-ordered patch from [PATCH 28/33] to [PATCH v2 18/33].

Link to v1:
https://lore.kernel.org/all/20250814223839.3256046-29-b-padhi@ti.com/

 .../boot/dts/ti/k3-am64-phycore-som.dtsi      | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 03c46d74ebb5..1efd547b2ba6 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -275,6 +275,30 @@ mbox_m4_0: mbox-m4-0 {
 	};
 };
 
+/* main_timer8 is used by r5f0-0 */
+&main_timer8 {
+	status = "reserved";
+};
+
+/* main_timer9 is used by r5f0-1 */
+&main_timer9 {
+	status = "reserved";
+};
+
+/* main_timer10 is used by r5f1-0 */
+&main_timer10 {
+	status = "reserved";
+};
+
+/* main_timer11 is used by r5f1-1 */
+&main_timer11 {
+	status = "reserved";
+};
+
+&main_r5fss0 {
+	status = "okay";
+};
+
 &main_i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c0_pins_default>;
-- 
2.34.1
Re: [PATCH v2 18/33] arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC Firmware
Posted by Wadim Egorov 1 month ago

On 8/23/25 7:08 PM, Beleswar Padhi wrote:
> The k3-am64-phycore SoM enables all R5F and M4F remote processors.
> Reserve the MAIN domain timers that are used by R5F remote
> processors for ticks to avoid rproc crashes. This config aligns with
> other AM64 boards and can be refactored out later.
> 
> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>

I am not sure you need this patch, because you are deleting everything 
you add in patch 32. But I tested the series on our hardware, so

Tested-by: Wadim Egorov <w.egorov@phytec.de>

> ---
> Cc: Wadim Egorov <w.egorov@phytec.de>
> Cc: Matt McKee <mmckee@phytec.com>
> Cc: Garrett Giordano <ggiordano@phytec.com>
> Cc: Nathan Morrisson <nmorrisson@phytec.com>
> Cc: John Ma <jma@phytec.com>
> Cc: Logan Bristol <logan.bristol@utexas.edu>
> Requesting for review/test of this patch.
> 
> v2: Changelog:
> 1. Re-ordered patch from [PATCH 28/33] to [PATCH v2 18/33].
> 
> Link to v1:
> https://lore.kernel.org/all/20250814223839.3256046-29-b-padhi@ti.com/
> 
>   .../boot/dts/ti/k3-am64-phycore-som.dtsi      | 24 +++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> index 03c46d74ebb5..1efd547b2ba6 100644
> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
> @@ -275,6 +275,30 @@ mbox_m4_0: mbox-m4-0 {
>   	};
>   };
>   
> +/* main_timer8 is used by r5f0-0 */
> +&main_timer8 {
> +	status = "reserved";
> +};
> +
> +/* main_timer9 is used by r5f0-1 */
> +&main_timer9 {
> +	status = "reserved";
> +};
> +
> +/* main_timer10 is used by r5f1-0 */
> +&main_timer10 {
> +	status = "reserved";
> +};
> +
> +/* main_timer11 is used by r5f1-1 */
> +&main_timer11 {
> +	status = "reserved";
> +};
> +
> +&main_r5fss0 {
> +	status = "okay";
> +};
> +
>   &main_i2c0 {
>   	pinctrl-names = "default";
>   	pinctrl-0 = <&main_i2c0_pins_default>;
Re: [PATCH v2 18/33] arm64: dts: ti: k3-am64-phycore-som: Add missing cfg for TI IPC Firmware
Posted by Beleswar Prasad Padhi 1 month ago
Hi Wadim,

On 28/08/25 17:12, Wadim Egorov wrote:
>
>
> On 8/23/25 7:08 PM, Beleswar Padhi wrote:
>> The k3-am64-phycore SoM enables all R5F and M4F remote processors.
>> Reserve the MAIN domain timers that are used by R5F remote
>> processors for ticks to avoid rproc crashes. This config aligns with
>> other AM64 boards and can be refactored out later.
>>
>> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
>
> I am not sure you need this patch, because you are deleting everything you add in patch 32.


I am also including the "k3-am64-ti-ipc-firmware.dtsi" in patch [32/33]
which has these timer configurations.

This [18/33] is an intermediate patch. We are putting all AM64* boards
into same configuration first before refactoring everything into a
common file [32/33]. That way if there is a bug someday in the future,
due to added configs, the bisect lands on the [18/33] patch and not on
the refactoring patch[32/33].

Just trying to keep every file same before & after the refactoring patch

> But I tested the series on our hardware, so
>
> Tested-by: Wadim Egorov <w.egorov@phytec.de>


Thanks,
Beleswar

>
>> ---
>> Cc: Wadim Egorov <w.egorov@phytec.de>
>> Cc: Matt McKee <mmckee@phytec.com>
>> Cc: Garrett Giordano <ggiordano@phytec.com>
>> Cc: Nathan Morrisson <nmorrisson@phytec.com>
>> Cc: John Ma <jma@phytec.com>
>> Cc: Logan Bristol <logan.bristol@utexas.edu>
>> Requesting for review/test of this patch.
>>
>> v2: Changelog:
>> 1. Re-ordered patch from [PATCH 28/33] to [PATCH v2 18/33].
>>
>> Link to v1:
>> https://lore.kernel.org/all/20250814223839.3256046-29-b-padhi@ti.com/
>>
>>   .../boot/dts/ti/k3-am64-phycore-som.dtsi      | 24 +++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
>> index 03c46d74ebb5..1efd547b2ba6 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
>> @@ -275,6 +275,30 @@ mbox_m4_0: mbox-m4-0 {
>>       };
>>   };
>>   +/* main_timer8 is used by r5f0-0 */
>> +&main_timer8 {
>> +    status = "reserved";
>> +};
>> +
>> +/* main_timer9 is used by r5f0-1 */
>> +&main_timer9 {
>> +    status = "reserved";
>> +};
>> +
>> +/* main_timer10 is used by r5f1-0 */
>> +&main_timer10 {
>> +    status = "reserved";
>> +};
>> +
>> +/* main_timer11 is used by r5f1-1 */
>> +&main_timer11 {
>> +    status = "reserved";
>> +};
>> +
>> +&main_r5fss0 {
>> +    status = "okay";
>> +};
>> +
>>   &main_i2c0 {
>>       pinctrl-names = "default";
>>       pinctrl-0 = <&main_i2c0_pins_default>;
>