arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)
Ever since these two commits
fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration")
2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration")
Herobrine systems fail to boot due to crashes like the following:
[ 0.243171] Kernel panic - not syncing: Asynchronous SError Interrupt
[ 0.243173] CPU: 7 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0 #1 c5464041cff584ced692726af2c4400fa2bde1db
[ 0.243178] Hardware name: Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+) (DT)
[ 0.243180] Call trace:
[ 0.243182] dump_backtrace+0x104/0x128
[ 0.243194] show_stack+0x24/0x38
[ 0.243202] __dump_stack+0x28/0x38
[ 0.243208] dump_stack_lvl+0x28/0xb8
[ 0.243211] dump_stack+0x18/0x30
[ 0.243215] panic+0x134/0x340
[ 0.243219] nmi_panic+0x48/0x98
[ 0.243227] arm64_serror_panic+0x6c/0x80
[ 0.243245] arm64_is_fatal_ras_serror+0xd8/0xe0
[ 0.243261] do_serror+0x5c/0xa8
[ 0.243265] el1h_64_error_handler+0x34/0x48
[ 0.243272] el1h_64_error+0x7c/0x80
[ 0.243285] regmap_mmio_read+0x5c/0xc0
[ 0.243289] _regmap_bus_reg_read+0x78/0xf8
[ 0.243296] regmap_update_bits_base+0xec/0x3a8
[ 0.243300] qcom_icc_rpmh_probe+0x2d4/0x490
[ 0.243308] platform_probe+0xb4/0xe0
[...]
Specifically, they fail in qcom_icc_set_qos() when trying to write the
QoS settings for qhm_qup1. Several of the previous nodes (qhm_qspi,
qhm_qup0, ...) seem to configure without crashing.
I don't really know what's unique about Herobrine systems vs other
sc7280 systems that presumably work fine. I'd guess there's some
conflict with something configured by the boot firmware.
I'm submitting as an RFC just to get thoughts from people who hopefully
know better than me what might be going wrong here.
Fixes: fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration")
Fixes: 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration")
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 2ba4ea60cb14..59203ce58c61 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -394,6 +394,16 @@ &vreg_l2c_1p8 {
/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
+/* QoS seems to have conflicts with boot firmware on these devices. */
+&aggre1_noc {
+ /delete-property/ clocks;
+};
+
+/* QoS seems to have conflicts with boot firmware on these devices. */
+&aggre2_noc {
+ /delete-property/ clocks;
+};
+
&edp_panel {
/* Our board provides power to the qcard for the eDP panel. */
power-supply = <&vreg_edp_3p3>;
--
2.51.0.rc2.233.g662b1ed5c5-goog
On Sat, 23 Aug 2025 12:37:18 -0700, Brian Norris wrote: > Ever since these two commits > > fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration") > 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration") > > Herobrine systems fail to boot due to crashes like the following: > > [ 0.243171] Kernel panic - not syncing: Asynchronous SError Interrupt > [ 0.243173] CPU: 7 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0 #1 c5464041cff584ced692726af2c4400fa2bde1db > [ 0.243178] Hardware name: Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+) (DT) > [ 0.243180] Call trace: > [ 0.243182] dump_backtrace+0x104/0x128 > [ 0.243194] show_stack+0x24/0x38 > [ 0.243202] __dump_stack+0x28/0x38 > [ 0.243208] dump_stack_lvl+0x28/0xb8 > [ 0.243211] dump_stack+0x18/0x30 > [ 0.243215] panic+0x134/0x340 > [ 0.243219] nmi_panic+0x48/0x98 > [ 0.243227] arm64_serror_panic+0x6c/0x80 > [ 0.243245] arm64_is_fatal_ras_serror+0xd8/0xe0 > [ 0.243261] do_serror+0x5c/0xa8 > [ 0.243265] el1h_64_error_handler+0x34/0x48 > [ 0.243272] el1h_64_error+0x7c/0x80 > [ 0.243285] regmap_mmio_read+0x5c/0xc0 > [ 0.243289] _regmap_bus_reg_read+0x78/0xf8 > [ 0.243296] regmap_update_bits_base+0xec/0x3a8 > [ 0.243300] qcom_icc_rpmh_probe+0x2d4/0x490 > [ 0.243308] platform_probe+0xb4/0xe0 > [...] > > Specifically, they fail in qcom_icc_set_qos() when trying to write the > QoS settings for qhm_qup1. Several of the previous nodes (qhm_qspi, > qhm_qup0, ...) seem to configure without crashing. > > I don't really know what's unique about Herobrine systems vs other > sc7280 systems that presumably work fine. I'd guess there's some > conflict with something configured by the boot firmware. > > I'm submitting as an RFC just to get thoughts from people who hopefully > know better than me what might be going wrong here. > > Fixes: fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration") > Fixes: 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration") > Signed-off-by: Brian Norris <briannorris@chromium.org> > --- > > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade This patch series was applied (using b4) to base: Base: attempting to guess base-commit... Base: tags/v6.17-rc1-15-g42feeddbbce6 (exact match) If this is not the correct base, please add 'base-commit' tag (or use b4 which does this automatically) New warnings running 'make CHECK_DTBS=y for arch/arm64/boot/dts/qcom/' for 20250823123718.RFC.1.Idebf1d8bd8ff507462fef9dc1ff47e84c01e9b60@changeid: arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-crd-pro.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-crd-pro.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-lte.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker-lte.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-lte.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-herobrine-r1.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme-lte.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme-lte.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-evoker.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-zombie-nvme.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r1-lte.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dtb: interconnect@16e0000 (qcom,sc7280-aggre1-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# arch/arm64/boot/dts/qcom/sc7280-herobrine-villager-r0.dtb: interconnect@1700000 (qcom,sc7280-aggre2-noc): 'clocks' is a required property from schema $id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
On Sat, Aug 23, 2025 at 12:37:18PM -0700, Brian Norris wrote: > Ever since these two commits > > fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration") > 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration") > > Herobrine systems fail to boot due to crashes like the following: Nice to see somebody using these boards! > > [ 0.243171] Kernel panic - not syncing: Asynchronous SError Interrupt > [ 0.243173] CPU: 7 UID: 0 PID: 1 Comm: swapper/0 Not tainted 6.11.0 #1 c5464041cff584ced692726af2c4400fa2bde1db > [ 0.243178] Hardware name: Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+) (DT) > [ 0.243180] Call trace: > [ 0.243182] dump_backtrace+0x104/0x128 > [ 0.243194] show_stack+0x24/0x38 > [ 0.243202] __dump_stack+0x28/0x38 > [ 0.243208] dump_stack_lvl+0x28/0xb8 > [ 0.243211] dump_stack+0x18/0x30 > [ 0.243215] panic+0x134/0x340 > [ 0.243219] nmi_panic+0x48/0x98 > [ 0.243227] arm64_serror_panic+0x6c/0x80 > [ 0.243245] arm64_is_fatal_ras_serror+0xd8/0xe0 > [ 0.243261] do_serror+0x5c/0xa8 > [ 0.243265] el1h_64_error_handler+0x34/0x48 > [ 0.243272] el1h_64_error+0x7c/0x80 > [ 0.243285] regmap_mmio_read+0x5c/0xc0 > [ 0.243289] _regmap_bus_reg_read+0x78/0xf8 > [ 0.243296] regmap_update_bits_base+0xec/0x3a8 > [ 0.243300] qcom_icc_rpmh_probe+0x2d4/0x490 > [ 0.243308] platform_probe+0xb4/0xe0 > [...] > > Specifically, they fail in qcom_icc_set_qos() when trying to write the > QoS settings for qhm_qup1. Several of the previous nodes (qhm_qspi, > qhm_qup0, ...) seem to configure without crashing. > > I don't really know what's unique about Herobrine systems vs other > sc7280 systems that presumably work fine. I'd guess there's some > conflict with something configured by the boot firmware. I think it well might be that Herobrine's TZ doesn't export QoS regions to Linux. > > I'm submitting as an RFC just to get thoughts from people who hopefully > know better than me what might be going wrong here. > > Fixes: fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration") > Fixes: 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration") > Signed-off-by: Brian Norris <briannorris@chromium.org> > --- > > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > index 2ba4ea60cb14..59203ce58c61 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > @@ -394,6 +394,16 @@ &vreg_l2c_1p8 { > > /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ > > +/* QoS seems to have conflicts with boot firmware on these devices. */ > +&aggre1_noc { > + /delete-property/ clocks; While it might be enough for Linux to make it skip the QoS, I think a more correct fix would be to remove the 'reg' instead / in addition. On the other hand, having those boards used by only a few people it might be easier to just pick up the simple fix rather than implementing a 'proper' one. Nevertheless, this would require changing the schema too, see Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml > +}; > + > +/* QoS seems to have conflicts with boot firmware on these devices. */ > +&aggre2_noc { > + /delete-property/ clocks; > +}; > + > &edp_panel { > /* Our board provides power to the qcard for the eDP panel. */ > power-supply = <&vreg_edp_3p3>; > -- > 2.51.0.rc2.233.g662b1ed5c5-goog > -- With best wishes Dmitry
Hi Dmitry, Thanks for the response. On Mon, Aug 25, 2025 at 12:22:03PM +0300, Dmitry Baryshkov wrote: > On Sat, Aug 23, 2025 at 12:37:18PM -0700, Brian Norris wrote: > > Specifically, they fail in qcom_icc_set_qos() when trying to write the > > QoS settings for qhm_qup1. Several of the previous nodes (qhm_qspi, > > qhm_qup0, ...) seem to configure without crashing. > > > > I don't really know what's unique about Herobrine systems vs other > > sc7280 systems that presumably work fine. I'd guess there's some > > conflict with something configured by the boot firmware. > > I think it well might be that Herobrine's TZ doesn't export QoS regions > to Linux. That may be. I don't really know what to look for to verify that without a lot of research, aside from crashes like this though. I'm fine with assuming this though. > > I'm submitting as an RFC just to get thoughts from people who hopefully > > know better than me what might be going wrong here. > > > > Fixes: fbd908bb8bc0 ("interconnect: qcom: sc7280: enable QoS configuration") > > Fixes: 2b5004956aff ("arm64: dts: qcom: sc7280: Add clocks for QOS configuration") > > Signed-off-by: Brian Norris <briannorris@chromium.org> > > --- > > > > arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 10 ++++++++++ > > 1 file changed, 10 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > > index 2ba4ea60cb14..59203ce58c61 100644 > > --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi > > @@ -394,6 +394,16 @@ &vreg_l2c_1p8 { > > > > /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ > > > > +/* QoS seems to have conflicts with boot firmware on these devices. */ > > +&aggre1_noc { > > + /delete-property/ clocks; > > While it might be enough for Linux to make it skip the QoS, I think a > more correct fix would be to remove the 'reg' instead / in addition. That should work too. However, besides simply violating Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml (which is easy enough to tweak), that also violates basic simple-bus rules: arch/arm64/boot/dts/qcom/sc7280-herobrine-crd.dtb: soc@0 (simple-bus): interconnect@16e0000: 'anyOf' conditional failed, one must be fixed: 'reg' is a required property 'ranges' is a required property from schema $id: http://devicetree.org/schemas/simple-bus.yaml# [...] > On the other hand, having those boards used by only a few people it > might be easier to just pick up the simple fix rather than implementing > a 'proper' one. > > Nevertheless, this would require changing the schema too, see > Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml Sure, I've tested out a change just to tweak the clock requirements. I'll plan on submitting that if no solution arises for the 'reg' schema. Brian
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