From: Vibhore Vardhan <vibhore@ti.com>

Correct reg length to match end address - start address for main
PADCFG registers. The last physical address for the main pad
configuration registers (MAIN_PADCFG_CTRL_MMR_CFG0_PADCONFIG150) is
0x000f4258. Adding 4 bytes gives 0x000f425c, so the size in device
tree should be defined as 0x25c instead of 0x2ac.

Reference Docs
TRM (AM62A) - https://www.ti.com/lit/ug/spruj16b/spruj16b.pdf
TRM (AM62D) - https://www.ti.com/lit/ug/sprujd4/sprujd4.pdf

Fixes: 5fc6b1b62639c ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Cc: <stable@vger.kernel.org>
Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 9cad79d7bbc1..260279702c01 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -267,7 +267,7 @@ secure_proxy_sa3: mailbox@43600000 {
 
 	main_pmx0: pinctrl@f4000 {
 		compatible = "pinctrl-single";
-		reg = <0x00 0xf4000 0x00 0x2ac>;
+		reg = <0x00 0xf4000 0x00 0x25c>;
 		#pinctrl-cells = <1>;
 		pinctrl-single,register-width = <32>;
 		pinctrl-single,function-mask = <0xffffffff>;
-- 
2.34.1

On Sat, Aug 23, 2025 at 08:53:03AM +0530, Paresh Bhagat wrote:
> From: Vibhore Vardhan <vibhore@ti.com>
> 
> Correct reg length to match end address - start address for main

nitpick: s/reg/register

I assume that you are implying "end address - start address" as
subtracting the "start address" from the "end address" to get the
length. This description might not be required given that you are
stating the 'last physical address for the main pad configuration
registers' below. You might rephrase it to indicate that the main pad
configuration register region starts with the
MAIN_PADCFG_CTRL_MMR_CFG0_PADCONFIG0 register having the address of
0x000f4000 and the region ends with the
MAIN_PADCFG_CTRL_MMR_CFG0_PADCONFIG150 register having the address of
0x000f4258, as a result of which, the length of the region is 0x25c
instead of 0x2ac.

> PADCFG registers. The last physical address for the main pad
> configuration registers (MAIN_PADCFG_CTRL_MMR_CFG0_PADCONFIG150) is
> 0x000f4258. Adding 4 bytes gives 0x000f425c, so the size in device
> tree should be defined as 0x25c instead of 0x2ac.
> 
> Reference Docs
> TRM (AM62A) - https://www.ti.com/lit/ug/spruj16b/spruj16b.pdf
> TRM (AM62D) - https://www.ti.com/lit/ug/sprujd4/sprujd4.pdf
> 
> Fixes: 5fc6b1b62639c ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
> Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>

[...]

Regards,
Siddharth.