Allow up to 4 lanes for the DisplayPort link from the PHYs to the
controllers now the mode-switch events can reach the QMP Combo PHYs.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/x1-crd.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1-crd.dtsi b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
index e3d2fc342bd184473b37882f3bc4f9c4d23135bd..ba8a2308714a45ecfa3a0fa0f5b213d9fc136d0d 100644
--- a/arch/arm64/boot/dts/qcom/x1-crd.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1-crd.dtsi
@@ -1149,7 +1149,7 @@ &mdss_dp0 {
};
&mdss_dp0_out {
- data-lanes = <0 1>;
+ data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
};
@@ -1158,7 +1158,7 @@ &mdss_dp1 {
};
&mdss_dp1_out {
- data-lanes = <0 1>;
+ data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
};
@@ -1167,7 +1167,7 @@ &mdss_dp2 {
};
&mdss_dp2_out {
- data-lanes = <0 1>;
+ data-lanes = <0 1 2 3>;
link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
};
--
2.34.1