Add binding doc for the ARM SSE(Subsystems for Embedded) timer. Here
is the document URL:
https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en
Although the IP is mostly seen on MCU SoC platforms, but nothing
prevent it from being integrated into linux capable SoC platforms.
The IP core may have a system counter to generate timestamp value,
a system timer to raise an interrupt when a period has elapsed, and
a System Watchdog to detect errant system behaviour then reset the
system if a period elapses without ping.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
.../bindings/timer/arm,sse_timer.yaml | 90 +++++++++++++++++++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
diff --git a/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
new file mode 100644
index 000000000000..37a79f9052d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/arm,sse_timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM SSE(Subsystems for Embedded) system timer
+
+maintainers:
+ - Jisheng Zhang <jszhang@kernel.org>
+
+description: |+
+ ARM SSE(Subsystems for Embedded) system timer core may have a system counter
+ to generate timestamp value, a system timer to raise an interrupt when a
+ period has elapsed, and a System Watchdog to detect errant system behaviour
+ then reset the system if a period elapses without ping.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,sse-timer
+
+ reg:
+ maxItems: 1
+ description: The system counter control frame base
+
+ clocks:
+ maxItems: 1
+
+ '#address-cells':
+ enum: [1, 2]
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
+patternProperties:
+ '^frame@[0-9a-f]+$':
+ type: object
+ additionalProperties: false
+ description: A timer node has some frame sub-nodes, each frame can be timer frame or watchdog frame. Each frame has the following properties.
+ properties:
+ interrupts:
+ minItems: 1
+ items:
+ - description: timer irq
+
+ reg:
+ minItems: 1
+ items:
+ - description: 1st view base address
+ - description: 2nd optional view base address if this is a watchdog frame
+
+ required:
+ - interrupts
+ - reg
+
+required:
+ - compatible
+ - reg
+ - '#address-cells'
+ - '#size-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ timer@f7f3e000 {
+ compatible = "arm,sse-timer";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0xf7f3e000 0x2000>;
+ clocks = <&core_clk>;
+
+ frame@f7f20000 {
+ reg = <0xf7f20000 0x1000>;
+ interrupts = <0 26 0x8>;
+ };
+
+ frame@f7f30000 {
+ interrupts = <0 15 0x8>;
+ reg = <0xf7f32000 0x1000>,
+ <0xf7f33000 0x1000>;
+ };
+ };
+
+...
--
2.50.1On Thu, Aug 21, 2025 at 11:24:28PM +0800, Jisheng Zhang wrote:
> Add binding doc for the ARM SSE(Subsystems for Embedded) timer. Here
> is the document URL:
> https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en
>
> Although the IP is mostly seen on MCU SoC platforms, but nothing
> prevent it from being integrated into linux capable SoC platforms.
But is there such integration?
>
> The IP core may have a system counter to generate timestamp value,
> a system timer to raise an interrupt when a period has elapsed, and
> a System Watchdog to detect errant system behaviour then reset the
> system if a period elapses without ping.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> .../bindings/timer/arm,sse_timer.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
> new file mode 100644
> index 000000000000..37a79f9052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
> @@ -0,0 +1,90 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/arm,sse_timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM SSE(Subsystems for Embedded) system timer
> +
> +maintainers:
> + - Jisheng Zhang <jszhang@kernel.org>
> +
> +description: |+
Drop |+
> + ARM SSE(Subsystems for Embedded) system timer core may have a system counter
> + to generate timestamp value, a system timer to raise an interrupt when a
> + period has elapsed, and a System Watchdog to detect errant system behaviour
> + then reset the system if a period elapses without ping.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
Drop these two, just const.
> + - arm,sse-timer
> +
> + reg:
> + maxItems: 1
> + description: The system counter control frame base
> +
> + clocks:
> + maxItems: 1
> +
> + '#address-cells':
> + enum: [1, 2]
> +
> + '#size-cells':
> + const: 1
> +
> + ranges: true
> +
> +patternProperties:
> + '^frame@[0-9a-f]+$':
> + type: object
> + additionalProperties: false
> + description: A timer node has some frame sub-nodes, each frame can be timer frame or watchdog frame. Each frame has the following properties.
Please follow Linux coding style.
> + properties:
> + interrupts:
> + minItems: 1
Drop
> + items:
> + - description: timer irq
Drop, instead maxItems: 1
> +
> + reg:
Keep order as in every other binding (and DTS coding style).
> + minItems: 1
> + items:
> + - description: 1st view base address
> + - description: 2nd optional view base address if this is a watchdog frame
> +
> + required:
> + - interrupts
> + - reg
Keep DTS coding style order.
> +
> +required:
> + - compatible
> + - reg
> + - '#address-cells'
> + - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + timer@f7f3e000 {
> + compatible = "arm,sse-timer";
> + #address-cells = <1>;
Keep order as in DTS coding style.
> + #size-cells = <1>;
> + ranges;
> + reg = <0xf7f3e000 0x2000>;
> + clocks = <&core_clk>;
> +
> + frame@f7f20000 {
> + reg = <0xf7f20000 0x1000>;
> + interrupts = <0 26 0x8>;
Use proper defines
> + };
> +
> + frame@f7f30000 {
> + interrupts = <0 15 0x8>;
> + reg = <0xf7f32000 0x1000>,
> + <0xf7f33000 0x1000>;
> + };
Best regards,
Krzysztof
On Thu, 21 Aug 2025 23:24:28 +0800, Jisheng Zhang wrote:
> Add binding doc for the ARM SSE(Subsystems for Embedded) timer. Here
> is the document URL:
> https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en
>
> Although the IP is mostly seen on MCU SoC platforms, but nothing
> prevent it from being integrated into linux capable SoC platforms.
>
> The IP core may have a system counter to generate timestamp value,
> a system timer to raise an interrupt when a period has elapsed, and
> a System Watchdog to detect errant system behaviour then reset the
> system if a period elapses without ping.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> .../bindings/timer/arm,sse_timer.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
>
My bot found errors running 'make dt_binding_check' on your patch:
yamllint warnings/errors:
./Documentation/devicetree/bindings/timer/arm,sse_timer.yaml:43:111: [warning] line too long (145 > 110 characters) (line-length)
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml: patternProperties:^frame@[0-9a-f]+$:properties:interrupts: 'oneOf' conditional failed, one must be fixed:
[{'description': 'timer irq'}] is too short
False schema does not allow 1
hint: "minItems" is only needed if less than the "items" list length
from schema $id: http://devicetree.org/meta-schemas/items.yaml#
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250821152429.26995-2-jszhang@kernel.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
On Thu, Aug 21, 2025 at 05:39:48PM -0500, Rob Herring (Arm) wrote:
>
> On Thu, 21 Aug 2025 23:24:28 +0800, Jisheng Zhang wrote:
> > Add binding doc for the ARM SSE(Subsystems for Embedded) timer. Here
> > is the document URL:
> > https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en
> >
> > Although the IP is mostly seen on MCU SoC platforms, but nothing
> > prevent it from being integrated into linux capable SoC platforms.
> >
> > The IP core may have a system counter to generate timestamp value,
> > a system timer to raise an interrupt when a period has elapsed, and
> > a System Watchdog to detect errant system behaviour then reset the
> > system if a period elapses without ping.
> >
> > Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> > ---
> > .../bindings/timer/arm,sse_timer.yaml | 90 +++++++++++++++++++
> > 1 file changed, 90 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
> >
>
> My bot found errors running 'make dt_binding_check' on your patch:
Oops, thanks for the hint. I would like to collect feedbacks to the
implementation itself, then fix the dt errors/warnings in v2.
Thanks
>
> yamllint warnings/errors:
> ./Documentation/devicetree/bindings/timer/arm,sse_timer.yaml:43:111: [warning] line too long (145 > 110 characters) (line-length)
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml: patternProperties:^frame@[0-9a-f]+$:properties:interrupts: 'oneOf' conditional failed, one must be fixed:
> [{'description': 'timer irq'}] is too short
> False schema does not allow 1
> hint: "minItems" is only needed if less than the "items" list length
> from schema $id: http://devicetree.org/meta-schemas/items.yaml#
>
> doc reference errors (make refcheckdocs):
>
> See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250821152429.26995-2-jszhang@kernel.org
>
> The base for the series is generally the latest rc1. A different dependency
> should be noted in *this* patch.
>
> If you already ran 'make dt_binding_check' and didn't see the above
> error(s), then make sure 'yamllint' is installed and dt-schema is up to
> date:
>
> pip3 install dtschema --upgrade
>
> Please check and re-submit after running the above command yourself. Note
> that DT_SCHEMA_FILES can be set to your schema file to speed up checking
> your schema. However, it must be unset to test all examples with your schema.
>
On Thu, Aug 21, 2025 at 11:24:28PM +0800, Jisheng Zhang wrote:
> Add binding doc for the ARM SSE(Subsystems for Embedded) timer. Here
> is the document URL:
> https://developer.arm.com/documentation/107610/0000/System-timer-components?lang=en
>
> Although the IP is mostly seen on MCU SoC platforms, but nothing
> prevent it from being integrated into linux capable SoC platforms.
>
> The IP core may have a system counter to generate timestamp value,
> a system timer to raise an interrupt when a period has elapsed, and
> a System Watchdog to detect errant system behaviour then reset the
> system if a period elapses without ping.
>
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
> .../bindings/timer/arm,sse_timer.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
>
> diff --git a/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
> new file mode 100644
> index 000000000000..37a79f9052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/timer/arm,sse_timer.yaml
> @@ -0,0 +1,90 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/timer/arm,sse_timer.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ARM SSE(Subsystems for Embedded) system timer
> +
> +maintainers:
> + - Jisheng Zhang <jszhang@kernel.org>
> +
> +description: |+
> + ARM SSE(Subsystems for Embedded) system timer core may have a system counter
> + to generate timestamp value, a system timer to raise an interrupt when a
> + period has elapsed, and a System Watchdog to detect errant system behaviour
> + then reset the system if a period elapses without ping.
> +
> +properties:
> + compatible:
> + items:
> + - enum:
> + - arm,sse-timer
> +
> + reg:
> + maxItems: 1
> + description: The system counter control frame base
> +
> + clocks:
> + maxItems: 1
> +
> + '#address-cells':
> + enum: [1, 2]
> +
> + '#size-cells':
> + const: 1
> +
> + ranges: true
> +
> +patternProperties:
> + '^frame@[0-9a-f]+$':
> + type: object
> + additionalProperties: false
> + description: A timer node has some frame sub-nodes, each frame can be timer frame or watchdog frame. Each frame has the following properties.
> + properties:
> + interrupts:
> + minItems: 1
> + items:
> + - description: timer irq
> +
> + reg:
> + minItems: 1
> + items:
> + - description: 1st view base address
> + - description: 2nd optional view base address if this is a watchdog frame
> +
> + required:
> + - interrupts
> + - reg
> +
> +required:
> + - compatible
> + - reg
> + - '#address-cells'
> + - '#size-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + timer@f7f3e000 {
> + compatible = "arm,sse-timer";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + reg = <0xf7f3e000 0x2000>;
> + clocks = <&core_clk>;
> +
> + frame@f7f20000 {
> + reg = <0xf7f20000 0x1000>;
> + interrupts = <0 26 0x8>;
> + };
> +
> + frame@f7f30000 {
> + interrupts = <0 15 0x8>;
> + reg = <0xf7f32000 0x1000>,
> + <0xf7f33000 0x1000>;
> + };
> + };
> +
> +...
> --
> 2.50.1
>
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