Add basic support for the Axis ARTPEC-8 SoC which contains
quad-core Cortex-A53 CPU and other several IPs. This SoC is an
Axis-designed chipset used in surveillance camera products such as
the AXIS Q1656-LE and AXIS Q3538-LVE.
This ARTPEC-8 SoC has a variety of Samsung-specific IP blocks and
Axis-specific IP blocks and SoC is manufactured by Samsung Foundry.
List of Samsung-provided IPs:
- UART
- Ethernet (Vendor: Synopsys)
- SDIO
- SPI
- HSI2C
- I2S
- CMU (Clock Management Unit)
- Pinctrl (GPIO)
- PCIe (Vendor: Synopsys)
- USB (Vendor: Synopsys)
List of Axis-provided IPs:
- VIP (Image Sensor Processing IP)
- VPP (Video Post Processing)
- GPU
- CDC (Video Encoder)
This patch series includes below changes:
- CMU (Clock Management Unit) driver and its bindings
- GPIO pinctrl configuration and its bindings
- Basic Device Tree for ARTPEC-8 SoC and boards
The patch series has been tested on the ARTPEC-8 EVB with
Linux v6.15-rc5 and intended to be merged via the `arm-soc` tree.
---
Changes in v2:
- Update SoB sections in all patches
- Update the copyright year to 2025
- Add CMU abbreviation description
- Merge dt-bindings patch 01 and 02 into single patch
- Modify yaml file to fit coding style in CMU
- Modify clock-names
- Reorder config macros to fit coding style
- Remove the unused macro in clock driver code
- Squash all clock driver patches (4 to 10) into single patch
- Split yaml conversion patch translation and add ARTPEC-8 SoC
- Remove "clock-frequency" property from cpu node in dtsi
- Remove the "status" property in dts and dtsi
- Reorder the DTS and pin nodes to follow the alphabetical and DTS coding style
- Change items property in axis.yaml
- Move dts files to exynos folder
- Removed ARCH_ARTPEC8 from platform Kconfig
- Add pattern in MAINTAINER file
- Merge dtsi and pinctrl dtsi file
- Split board dts file
Link to v1: https://lore.kernel.org/all/20250710002047.1573841-1-ksk4725@coasia.com/
NOTE: The first version has been sent by Coasia.
After that, it has been agreed between Coasia and Samsung that Samsung will take
ownership of upstreaming ARTPEC-8 and ARTPEC-9 platforms.
---
Hakyeong Kim (3):
dt-bindings: clock: Add ARTPEC-8 clock controller
clk: samsung: Add clock PLL support for ARTPEC-8 SoC
clk: samsung: artpec-8: Add initial clock support for ARTPEC-8 SoC
Ravi Patel (1):
dt-bindings: arm: Convert Axis board/soc bindings to json-schema
SeonGu Kang (3):
dt-bindings: pinctrl: samsung: Add compatible for ARTPEC-8 SoC
pinctrl: samsung: Add ARTPEC-8 SoC specific configuration
arm64: dts: axis: Add ARTPEC-8 Grizzly dts support
SungMin Park (3):
dt-bindings: arm: axis: Add ARTPEC-8 grizzly board
arm64: dts: exynos: axis: Add initial ARTPEC-8 SoC support
arm64: defconfig: Enable Axis ARTPEC SoC
.../devicetree/bindings/arm/axis.txt | 13 -
.../devicetree/bindings/arm/axis.yaml | 36 +
.../bindings/clock/axis,artpec8-clock.yaml | 213 ++++
.../bindings/pinctrl/samsung,pinctrl.yaml | 1 +
MAINTAINERS | 12 +
arch/arm64/Kconfig.platforms | 7 +
arch/arm64/boot/dts/exynos/Makefile | 1 +
arch/arm64/boot/dts/exynos/axis/Makefile | 4 +
.../boot/dts/exynos/axis/artpec-pinctrl.h | 36 +
.../boot/dts/exynos/axis/artpec8-grizzly.dts | 35 +
.../boot/dts/exynos/axis/artpec8-pinctrl.dtsi | 120 ++
arch/arm64/boot/dts/exynos/axis/artpec8.dtsi | 244 ++++
arch/arm64/configs/defconfig | 1 +
drivers/clk/samsung/Makefile | 1 +
drivers/clk/samsung/clk-artpec8.c | 1044 +++++++++++++++++
drivers/clk/samsung/clk-pll.c | 128 +-
drivers/clk/samsung/clk-pll.h | 2 +
.../pinctrl/samsung/pinctrl-exynos-arm64.c | 50 +
drivers/pinctrl/samsung/pinctrl-exynos.h | 10 +
drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +
drivers/pinctrl/samsung/pinctrl-samsung.h | 1 +
include/dt-bindings/clock/axis,artpec8-clk.h | 169 +++
22 files changed, 2116 insertions(+), 14 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/axis.txt
create mode 100644 Documentation/devicetree/bindings/arm/axis.yaml
create mode 100644 Documentation/devicetree/bindings/clock/axis,artpec8-clock.yaml
create mode 100644 arch/arm64/boot/dts/exynos/axis/Makefile
create mode 100644 arch/arm64/boot/dts/exynos/axis/artpec-pinctrl.h
create mode 100644 arch/arm64/boot/dts/exynos/axis/artpec8-grizzly.dts
create mode 100644 arch/arm64/boot/dts/exynos/axis/artpec8-pinctrl.dtsi
create mode 100644 arch/arm64/boot/dts/exynos/axis/artpec8.dtsi
create mode 100644 drivers/clk/samsung/clk-artpec8.c
create mode 100644 include/dt-bindings/clock/axis,artpec8-clk.h
--
2.49.0