Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon
SoCs.
The PHY handles muxing between these different protocols and also provides
the reset controller for the attached dwc3 USB controller.
Signed-off-by: Sven Peter <sven@kernel.org>
---
.../devicetree/bindings/phy/apple,atcphy.yaml | 210 +++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 211 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/apple,atcphy.yaml b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..eb14010557c94f313b54b528e2d4039fe540062a
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
@@ -0,0 +1,210 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple Type-C PHY (ATCPHY)
+
+maintainers:
+ - Sven Peter <sven@kernel.org>
+
+description:
+ The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
+ USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs.
+
+ The PHY handles muxing between these different protocols and also provides the
+ reset controller for the attached dwc3 USB controller.
+
+ The PHY is designed for USB4 operation and does not handle individual
+ differential pairs as distinct DisplayPort lanes. Any reference to lane in
+ this binding hence refers to two differential pairs (RX and TX) as used in USB
+ terminology.
+
+properties:
+ compatible:
+ enum:
+ - apple,t6000-atcphy
+ - apple,t6000-atcphy-dp-only # PHY hardwired to DP-to-HDMI converter on M2 Pro MacBook
+ - apple,t6020-atcphy
+ - apple,t8103-atcphy
+ - apple,t8112-atcphy
+
+ reg:
+ minItems: 5
+ maxItems: 5
+
+ reg-names:
+ items:
+ - const: core
+ - const: lpdptx
+ - const: axi2af
+ - const: usb2phy
+ - const: pipehandler
+
+ "#phy-cells":
+ const: 1
+
+ "#reset-cells":
+ const: 0
+
+ orientation-switch:
+ type: boolean
+ description:
+ The PHY handles swapping lanes if the Type-C connector is flipped.
+
+ mode-switch:
+ type: boolean
+ description:
+ The PHY handles muxing between USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort.
+
+ power-domains:
+ minItems: 1
+ maxItems: 1
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Output endpoint of the PHY to the Type-C connector
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Incoming endpoint from the USB3 controller
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Incoming endpoint from the DisplayPort controller
+
+ port@3:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Incoming endpoint from the USB4/Thunderbolt controller
+
+ apple,tunable-axi2af:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ AXI2AF tunables.
+
+ This array is filled with 3-tuples each containing three 32-bit values
+ <register offset>, <mask>, and <value> by the bootloader.
+ The driver will use these to configure the PHY by reading from each
+ register, ANDing it with <mask>, ORing it with <value>, and storing the
+ result back to the register.
+ These values slightly differ even between different chips of the same
+ generation and are likely calibration values determined by Apple at
+ manufacturing time.
+
+ apple,tunable-common:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Common tunables required for all modes, see apple,tunable-axi2af for details.
+
+ apple,tunable-fuses:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Fuse based tunables required for all modes, see apple,tunable-axi2af for details.
+
+ apple,tunable-lane0-usb:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ USB tunables on lane 0, see apple,tunable-axi2af for details.
+
+ apple,tunable-lane1-usb:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ USB tunables on lane 1, see apple,tunable-axi2af for details.
+
+ apple,tunable-lane0-cio:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ USB4/Thunderbolt ("converged IO") tunables on lane 0, see apple,tunable-axi2af for details.
+
+ apple,tunable-lane1-cio:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ USB4/Thunderbolt ("converged IO") tunables on lane 1, see apple,tunable-axi2af for details.
+
+ apple,tunable-lane0-dp:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ DisplayPort tunables on lane 0, see apple,tunable-axi2af for details.
+
+ Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
+ and not to an individual DisplayPort differential lane.
+
+ apple,tunable-lane1-dp:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ DisplayPort tunables on lane 1, see apple,tunable-axi2af for details.
+
+ Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
+ and not to an individual DisplayPort differential lane.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - "#phy-cells"
+ - "#reset-cells"
+ - orientation-switch
+ - mode-switch
+
+additionalProperties: false
+
+examples:
+ - |
+ phy@383000000 {
+ compatible = "apple,t8103-atcphy";
+ reg = <0x3 0x83000000 0x0 0x4c000>,
+ <0x3 0x83050000 0x0 0x8000>,
+ <0x3 0x80000000 0x0 0x4000>,
+ <0x3 0x82a90000 0x0 0x4000>,
+ <0x3 0x82a84000 0x0 0x4000>;
+ reg-names = "core", "lpdptx", "axi2af", "usb2phy",
+ "pipehandler";
+
+ #phy-cells = <1>;
+ #reset-cells = <0>;
+
+ orientation-switch;
+ mode-switch;
+ power-domains = <&ps_atc0_usb>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ endpoint {
+ remote-endpoint = <&typec_connector_ss>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ endpoint {
+ remote-endpoint = <&dwc3_ss_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ endpoint {
+ remote-endpoint = <&dcp_dp_out>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+
+ endpoint {
+ remote-endpoint = <&acio_tbt_out>;
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 0e085cb0762f765958d67be61ae0d3d773503431..11a9b084a2e51d7b9b2e4c1777a2439df4a6858b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2393,6 +2393,7 @@ F: Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
F: Documentation/devicetree/bindings/nvmem/apple,efuses.yaml
F: Documentation/devicetree/bindings/nvmem/apple,spmi-nvmem.yaml
F: Documentation/devicetree/bindings/pci/apple,pcie.yaml
+F: Documentation/devicetree/bindings/phy/apple,atcphy.yaml
F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
F: Documentation/devicetree/bindings/power/apple*
F: Documentation/devicetree/bindings/power/reset/apple,smc-reboot.yaml
--
2.34.1On Thu, 21 Aug 2025 15:38:55 +0000, Sven Peter wrote: > Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, > USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon > SoCs. > > The PHY handles muxing between these different protocols and also provides > the reset controller for the attached dwc3 USB controller. > > Signed-off-by: Sven Peter <sven@kernel.org> > --- > .../devicetree/bindings/phy/apple,atcphy.yaml | 210 +++++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 211 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/apple,atcphy.yaml: properties:power-domains: 'anyOf' conditional failed, one must be fixed: 'minItems' is not one of ['maxItems', 'description', 'deprecated'] hint: Only "maxItems" is required for a single entry if there are no constraints defined for the values. 'minItems' is not one of ['description', 'deprecated', 'const', 'enum', 'minimum', 'maximum', 'multipleOf', 'default', '$ref', 'oneOf'] 'maxItems' is not one of ['description', 'deprecated', 'const', 'enum', 'minimum', 'maximum', 'multipleOf', 'default', '$ref', 'oneOf'] 1 is less than the minimum of 2 hint: Arrays must be described with a combination of minItems/maxItems/items hint: cell array properties must define how many entries and what the entries are when there is more than one entry. from schema $id: http://devicetree.org/meta-schemas/power-domain.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/apple,atcphy.example.dtb: phy@383000000 (apple,t8103-atcphy): reg: [[3, 2197815296], [0, 311296], [3, 2198142976], [0, 32768], [3, 2147483648], [0, 16384], [3, 2192113664], [0, 16384], [3, 2192064512], [0, 16384]] is too long from schema $id: http://devicetree.org/schemas/phy/apple,atcphy.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250821-atcphy-6-17-v1-3-172beda182b8@kernel.org The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Thu, Aug 21, 2025 at 03:38:55PM +0000, Sven Peter wrote:
> Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
> USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon
> SoCs.
>
> The PHY handles muxing between these different protocols and also provides
> the reset controller for the attached dwc3 USB controller.
>
> Signed-off-by: Sven Peter <sven@kernel.org>
> ---
> .../devicetree/bindings/phy/apple,atcphy.yaml | 210 +++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 211 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/phy/apple,atcphy.yaml b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..eb14010557c94f313b54b528e2d4039fe540062a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml
> @@ -0,0 +1,210 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Apple Type-C PHY (ATCPHY)
> +
> +maintainers:
> + - Sven Peter <sven@kernel.org>
> +
> +description:
> + The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x,
> + USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs.
> +
> + The PHY handles muxing between these different protocols and also provides the
> + reset controller for the attached dwc3 USB controller.
> +
> + The PHY is designed for USB4 operation and does not handle individual
> + differential pairs as distinct DisplayPort lanes. Any reference to lane in
> + this binding hence refers to two differential pairs (RX and TX) as used in USB
> + terminology.
> +
> +properties:
> + compatible:
> + enum:
> + - apple,t6000-atcphy
> + - apple,t6000-atcphy-dp-only # PHY hardwired to DP-to-HDMI converter on M2 Pro MacBook
The comment is misleading, "t6000-atcphy-dp-only" would be for M1
Pro/Max Macbooks. M2 Pro/Max Macbooks use the same design so the
corresponding "apple,t6020-atcphy-dp-only" compatible is missing.
I'm not sure this is the correct design though as the HW block is
identical to "apple,t6000-atcphy".
I think it might be better to have either the DRM KMS driver or a
custom DP->HDMI drm_bridge switch the mode to DP-only.
Or atcphy could initialize itself to DP-only based on the available
ports.
> + - apple,t6020-atcphy
> + - apple,t8103-atcphy
> + - apple,t8112-atcphy
> +
> + reg:
> + minItems: 5
> + maxItems: 5
> +
> + reg-names:
> + items:
> + - const: core
> + - const: lpdptx
> + - const: axi2af
> + - const: usb2phy
> + - const: pipehandler
> +
> + "#phy-cells":
> + const: 1
> +
> + "#reset-cells":
> + const: 0
> +
> + orientation-switch:
> + type: boolean
> + description:
> + The PHY handles swapping lanes if the Type-C connector is flipped.
> +
> + mode-switch:
> + type: boolean
> + description:
> + The PHY handles muxing between USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort.
These two properties could be referenced from
/schemas/usb/usb-switch.yaml, see
https://lore.kernel.org/linux-devicetree/20250807-topic-4ln_dp_respin-v4-1-43272d6eca92@oss.qualcomm.com/
> + power-domains:
> + minItems: 1
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Output endpoint of the PHY to the Type-C connector
Not sure if it's justified to mention the hardwired DP->HDMI converter
in 14-/16-inch Macbooks Pro here as well.
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB3 controller
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the DisplayPort controller
> +
> + port@3:
> + $ref: /schemas/graph.yaml#/properties/port
> + description: Incoming endpoint from the USB4/Thunderbolt controller
> +
> + apple,tunable-axi2af:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + AXI2AF tunables.
> +
> + This array is filled with 3-tuples each containing three 32-bit values
> + <register offset>, <mask>, and <value> by the bootloader.
> + The driver will use these to configure the PHY by reading from each
> + register, ANDing it with <mask>, ORing it with <value>, and storing the
> + result back to the register.
> + These values slightly differ even between different chips of the same
> + generation and are likely calibration values determined by Apple at
> + manufacturing time.
> +
> + apple,tunable-common:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Common tunables required for all modes, see apple,tunable-axi2af for details.
> +
> + apple,tunable-fuses:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Fuse based tunables required for all modes, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-usb:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane1-usb:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-cio:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB4/Thunderbolt ("converged IO") tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane1-cio:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + USB4/Thunderbolt ("converged IO") tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + apple,tunable-lane0-dp:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + DisplayPort tunables on lane 0, see apple,tunable-axi2af for details.
> +
> + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
> + and not to an individual DisplayPort differential lane.
> +
> + apple,tunable-lane1-dp:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + DisplayPort tunables on lane 1, see apple,tunable-axi2af for details.
> +
> + Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
> + and not to an individual DisplayPort differential lane.
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - "#phy-cells"
> + - "#reset-cells"
> + - orientation-switch
> + - mode-switch
any reason not to require "ports"? This would be carried over from
usb-switch
Janne
On Thu, Aug 21, 2025 at 11:33 AM Janne Grunau <j@jannau.net> wrote: > > On Thu, Aug 21, 2025 at 03:38:55PM +0000, Sven Peter wrote: > > Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, > > USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon > > SoCs. > > > > The PHY handles muxing between these different protocols and also provides > > the reset controller for the attached dwc3 USB controller. > > > > Signed-off-by: Sven Peter <sven@kernel.org> > > --- > > .../devicetree/bindings/phy/apple,atcphy.yaml | 210 +++++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 211 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/phy/apple,atcphy.yaml b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml > > new file mode 100644 > > index 0000000000000000000000000000000000000000..eb14010557c94f313b54b528e2d4039fe540062a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/apple,atcphy.yaml > > @@ -0,0 +1,210 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Apple Type-C PHY (ATCPHY) > > + > > +maintainers: > > + - Sven Peter <sven@kernel.org> > > + > > +description: > > + The Apple Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, > > + USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs. > > + > > + The PHY handles muxing between these different protocols and also provides the > > + reset controller for the attached dwc3 USB controller. > > + > > + The PHY is designed for USB4 operation and does not handle individual > > + differential pairs as distinct DisplayPort lanes. Any reference to lane in > > + this binding hence refers to two differential pairs (RX and TX) as used in USB > > + terminology. > > + > > +properties: > > + compatible: > > + enum: > > + - apple,t6000-atcphy > > + - apple,t6000-atcphy-dp-only # PHY hardwired to DP-to-HDMI converter on M2 Pro MacBook > > The comment is misleading, "t6000-atcphy-dp-only" would be for M1 > Pro/Max Macbooks. M2 Pro/Max Macbooks use the same design so the > corresponding "apple,t6020-atcphy-dp-only" compatible is missing. > I'm not sure this is the correct design though as the HW block is > identical to "apple,t6000-atcphy". > I think it might be better to have either the DRM KMS driver or a > custom DP->HDMI drm_bridge switch the mode to DP-only. > Or atcphy could initialize itself to DP-only based on the available > ports. Doesn't sound like this should be a different compatible. There's a 'phy-mode' property or you can define the mode in the 'phys' cells for the DP controller. Rob
On 22.08.25 01:00, Rob Herring wrote: > On Thu, Aug 21, 2025 at 11:33 AM Janne Grunau <j@jannau.net> wrote: >> >> On Thu, Aug 21, 2025 at 03:38:55PM +0000, Sven Peter wrote: [...] >>> + >>> +properties: >>> + compatible: >>> + enum: >>> + - apple,t6000-atcphy >>> + - apple,t6000-atcphy-dp-only # PHY hardwired to DP-to-HDMI converter on M2 Pro MacBook >> >> The comment is misleading, "t6000-atcphy-dp-only" would be for M1 >> Pro/Max Macbooks. M2 Pro/Max Macbooks use the same design so the >> corresponding "apple,t6020-atcphy-dp-only" compatible is missing. >> I'm not sure this is the correct design though as the HW block is >> identical to "apple,t6000-atcphy". >> I think it might be better to have either the DRM KMS driver or a >> custom DP->HDMI drm_bridge switch the mode to DP-only. >> Or atcphy could initialize itself to DP-only based on the available >> ports. > > Doesn't sound like this should be a different compatible. There's a > 'phy-mode' property or you can define the mode in the 'phys' cells for > the DP controller. Okay, makes sense. I'll drop the compatible. I've only found "intel,phy-mode" inside bindings/phy but we can figure this out later once we actually get to upstreaming what's required for DisplayPort and mostly focus on USB3 for this series. Thanks Sven
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