[PATCH RESEND 1/2] dt-bindings: i2c: nvidia,tegra20-i2c: Add Tegra256 I2C compatible

Akhil R posted 2 patches 1 month, 2 weeks ago
There is a newer version of this series
[PATCH RESEND 1/2] dt-bindings: i2c: nvidia,tegra20-i2c: Add Tegra256 I2C compatible
Posted by Akhil R 1 month, 2 weeks ago
Add compatible for Tegra256 I2C controllers. Tegra256 consists of
8 generic Tegra I2C controllers similar to previous generations.
The parent clock frequency is different in these controllers and
hence the timing parameter values are different from the previous
ones.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>

---
 .../devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml         | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
index 6b6f6762d122..6f58eb79a7b3 100644
--- a/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
+++ b/Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml
@@ -80,6 +80,11 @@ properties:
           support for 64 KiB transactions whereas earlier chips supported no
           more than 4 KiB per transactions.
         const: nvidia,tegra194-i2c
+      - description: |
+          Tegra256 has 8 generic I2C controllers. The controllers are similar to
+          the previous generations, but have a different parent clock and hence
+          the timing parameters are configured differently.
+        const: nvidia,tegra256-i2c
 
   reg:
     maxItems: 1
@@ -186,6 +191,7 @@ allOf:
             contains:
               enum:
                 - nvidia,tegra194-i2c
+                - nvidia,tegra256-i2c
     then:
       required:
         - resets
-- 
2.50.1
Re: [PATCH RESEND 1/2] dt-bindings: i2c: nvidia,tegra20-i2c: Add Tegra256 I2C compatible
Posted by Wolfram Sang 3 weeks ago
On Mon, Aug 18, 2025 at 10:03:44AM +0530, Akhil R wrote:
> Add compatible for Tegra256 I2C controllers. Tegra256 consists of
> 8 generic Tegra I2C controllers similar to previous generations.
> The parent clock frequency is different in these controllers and
> hence the timing parameter values are different from the previous
> ones.
> 
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> Acked-by: Rob Herring (Arm) <robh@kernel.org>
> Acked-by: Thierry Reding <treding@nvidia.com>
> 

Applied to for-next, thanks!