From: Li Liu <quic_lliu6@quicinc.com>
Add display MDSS and DSI configuration for QCS615 RIDE board.
QCS615 has a DP port, and DP support will be added in a later patch.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
1 file changed, 90 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
};
};
+ dp-dsi0-connector {
+ compatible = "dp-connector";
+ label = "DSI0";
+ type = "mini";
+
+ port {
+ dp_dsi0_connector_in: endpoint {
+ remote-endpoint = <&dsi2dp_bridge_out>;
+ };
+ };
+ };
+
vreg_conn_1p8: regulator-conn-1p8 {
compatible = "regulator-fixed";
regulator-name = "vreg_conn_1p8";
@@ -294,6 +306,84 @@ &gcc {
<&sleep_clk>;
};
+&i2c2 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ io_expander: gpio@3e {
+ compatible = "semtech,sx1509q";
+ reg = <0x3e>;
+ interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ semtech,probe-reset;
+ };
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9542";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ bridge@58 {
+ compatible = "analogix,anx7625";
+ reg = <0x58>;
+ interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
+ enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
+ wakeup-source;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ dsi2dp_bridge_in: endpoint {
+ remote-endpoint = <&mdss_dsi0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ dsi2dp_bridge_out: endpoint {
+ remote-endpoint = <&dp_dsi0_connector_in>;
+ };
+ };
+ };
+ };
+ };
+ };
+};
+
+&mdss {
+ status = "okay";
+};
+
+&mdss_dsi0 {
+ vdda-supply = <&vreg_l11a>;
+ status = "okay";
+};
+
+&mdss_dsi0_out {
+ remote-endpoint = <&dsi2dp_bridge_in>;
+ data-lanes = <0 1 2 3>;
+};
+
+&mdss_dsi0_phy {
+ vdds-supply = <&vreg_l5a>;
+ status = "okay";
+};
+
&pcie {
perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
--
2.34.1On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
> From: Li Liu <quic_lliu6@quicinc.com>
>
> Add display MDSS and DSI configuration for QCS615 RIDE board.
> QCS615 has a DP port, and DP support will be added in a later patch.
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
Running dtb checker after applying your patch gives me the following:
> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
> UPD include/config/kernel.release
> HOSTCC scripts/basic/fixdep
> SCHEMA Documentation/devicetree/bindings/processed-schema.json
> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode: missing type definition
> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-gain-reduction-db: missing type definition
> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml: fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000: 'clock-names' is a required property
> from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml#
Taniya is looking at this one.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0: 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
> from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply' is a required property
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source' does not match any of the regexes: 'pinctrl-[0-9]+'
> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
This is from your patch.
> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated properties are not allowed ('vdds-supply' was unexpected)
> from schema $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
This is from your patch.
Am I missing something? Is there any reason why these 6 new errors
should be added?
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
> 1 file changed, 90 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
> };
> };
>
> + dp-dsi0-connector {
> + compatible = "dp-connector";
> + label = "DSI0";
> + type = "mini";
> +
> + port {
> + dp_dsi0_connector_in: endpoint {
> + remote-endpoint = <&dsi2dp_bridge_out>;
> + };
> + };
> + };
> +
> vreg_conn_1p8: regulator-conn-1p8 {
> compatible = "regulator-fixed";
> regulator-name = "vreg_conn_1p8";
> @@ -294,6 +306,84 @@ &gcc {
> <&sleep_clk>;
> };
>
> +&i2c2 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + io_expander: gpio@3e {
> + compatible = "semtech,sx1509q";
> + reg = <0x3e>;
> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + semtech,probe-reset;
> + };
> +
> + i2c-mux@77 {
> + compatible = "nxp,pca9542";
> + reg = <0x77>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@58 {
> + compatible = "analogix,anx7625";
> + reg = <0x58>;
> + interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
> + wakeup-source;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + dsi2dp_bridge_in: endpoint {
> + remote-endpoint = <&mdss_dsi0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + dsi2dp_bridge_out: endpoint {
> + remote-endpoint = <&dp_dsi0_connector_in>;
> + };
> + };
> + };
> + };
> + };
> + };
> +};
> +
> +&mdss {
> + status = "okay";
> +};
> +
> +&mdss_dsi0 {
> + vdda-supply = <&vreg_l11a>;
> + status = "okay";
> +};
> +
> +&mdss_dsi0_out {
> + remote-endpoint = <&dsi2dp_bridge_in>;
> + data-lanes = <0 1 2 3>;
> +};
> +
> +&mdss_dsi0_phy {
> + vdds-supply = <&vreg_l5a>;
> + status = "okay";
> +};
> +
> &pcie {
> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>
> --
> 2.34.1
>
On 8/24/2025 11:15 AM, Bjorn Andersson wrote:
> On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
>> From: Li Liu <quic_lliu6@quicinc.com>
>>
>> Add display MDSS and DSI configuration for QCS615 RIDE board.
>> QCS615 has a DP port, and DP support will be added in a later patch.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
>> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
>
> Running dtb checker after applying your patch gives me the following:
>> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
>> UPD include/config/kernel.release
>> HOSTCC scripts/basic/fixdep
>> SCHEMA Documentation/devicetree/bindings/processed-schema.json
>> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode: missing type definition
>> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-gain-reduction-db: missing type definition
>> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml: fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
>> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000: 'clock-names' is a required property
>> from schema $id: http://devicetree.org/schemas/clock/qcom,qcs615-gcc.yaml#
>
> Taniya is looking at this one.
Got it. Since the patch appears to be accepted, should I still wait for
mm clk version 7?
https://patchwork.kernel.org/project/linux-arm-msm/patch/20250814-qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com/
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0: 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
>> from schema $id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#
>
> This is from your patch.
got it, will change "gpio@3e" to "pinctrl@3e"
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
got it, will add this part like
https://lore.kernel.org/all/20250604071851.1438612-3-quic_amakhija@quicinc.com/
@@ -51,6 +51,64 @@ dp_dsi0_connector_in: endpoint {
};
};
+ vreg_12p0: vreg-12p0-regulator {=
...
@@ -338,7 +396,9 @@ bridge@58 {
interrupts-extended = <&io_expander 0
IRQ_TYPE_EDGE_FALLING>;
enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
- wakeup-source;
+ vdd10-supply = <&vreg_1p0>;
+ vdd18-supply = <&vreg_1p8>;
+ vdd33-supply = <&vreg_3p0>;
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
same as above
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply' is a required property
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
same as above
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source' does not match any of the regexes: 'pinctrl-[0-9]+'
>> from schema $id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#
>
> This is from your patch.
will remove it
>
>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated properties are not allowed ('vdds-supply' was unexpected)
>> from schema $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
>
> This is from your patch.
will change "vdds-supply" to "vcca-supply"
>
>
> Am I missing something? Is there any reason why these 6 new errors
> should be added?
Sorry, I missed those parts earlier. I've re-tested and confirmed the
changes. The patch can pass after refine.
Would it be appropriate to send v7 now, or should I wait until the mm
clk v7 is ready?
>
> Regards,
> Bjorn
>
>> ---
>> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 ++++++++++++++++++++++++++++++++
>> 1 file changed, 90 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> index 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
>> };
>> };
>>
>> + dp-dsi0-connector {
>> + compatible = "dp-connector";
>> + label = "DSI0";
>> + type = "mini";
>> +
>> + port {
>> + dp_dsi0_connector_in: endpoint {
>> + remote-endpoint = <&dsi2dp_bridge_out>;
>> + };
>> + };
>> + };
>> +
>> vreg_conn_1p8: regulator-conn-1p8 {
>> compatible = "regulator-fixed";
>> regulator-name = "vreg_conn_1p8";
>> @@ -294,6 +306,84 @@ &gcc {
>> <&sleep_clk>;
>> };
>>
>> +&i2c2 {
>> + clock-frequency = <400000>;
>> + status = "okay";
>> +
>> + io_expander: gpio@3e {
>> + compatible = "semtech,sx1509q";
>> + reg = <0x3e>;
>> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + semtech,probe-reset;
>> + };
>> +
>> + i2c-mux@77 {
>> + compatible = "nxp,pca9542";
>> + reg = <0x77>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + i2c@0 {
>> + reg = <0>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + bridge@58 {
>> + compatible = "analogix,anx7625";
>> + reg = <0x58>;
>> + interrupts-extended = <&io_expander 0 IRQ_TYPE_EDGE_FALLING>;
>> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
>> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
>> + wakeup-source;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + dsi2dp_bridge_in: endpoint {
>> + remote-endpoint = <&mdss_dsi0_out>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + dsi2dp_bridge_out: endpoint {
>> + remote-endpoint = <&dp_dsi0_connector_in>;
>> + };
>> + };
>> + };
>> + };
>> + };
>> + };
>> +};
>> +
>> +&mdss {
>> + status = "okay";
>> +};
>> +
>> +&mdss_dsi0 {
>> + vdda-supply = <&vreg_l11a>;
>> + status = "okay";
>> +};
>> +
>> +&mdss_dsi0_out {
>> + remote-endpoint = <&dsi2dp_bridge_in>;
>> + data-lanes = <0 1 2 3>;
>> +};
>> +
>> +&mdss_dsi0_phy {
>> + vdds-supply = <&vreg_l5a>;
>> + status = "okay";
>> +};
>> +
>> &pcie {
>> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
>> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>>
>> --
>> 2.34.1
>>
On 8/26/2025 4:08 PM, Fange Zhang wrote:
>
>
> On 8/24/2025 11:15 AM, Bjorn Andersson wrote:
>> On Mon, Aug 18, 2025 at 12:39:21PM +0800, Fange Zhang wrote:
>>> From: Li Liu <quic_lliu6@quicinc.com>
>>>
>>> Add display MDSS and DSI configuration for QCS615 RIDE board.
>>> QCS615 has a DP port, and DP support will be added in a later patch.
>>>
>>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>>> Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
>>> Signed-off-by: Fange Zhang <fange.zhang@oss.qualcomm.com>
>>
>> Running dtb checker after applying your patch gives me the following:
>>> $ make qcom/qcs615-ride.dtb CHECK_DTBS=1
>>> UPD include/config/kernel.release
>>> HOSTCC scripts/basic/fixdep
>>> SCHEMA Documentation/devicetree/bindings/processed-schema.json
>>> Documentation/devicetree/bindings/net/snps,dwmac.yaml: mac-mode:
>>> missing type definition
>>> Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml: ti,rx-
>>> gain-reduction-db: missing type definition
>>> Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml:
>>> fsl,phy-pcs-tx-deemph-3p5db-attenuation-db: missing type definition
>>> DTC [C] arch/arm64/boot/dts/qcom/qcs615-ride.dtb
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: clock-controller@100000:
>>> 'clock-names' is a required property
>>> from schema $id: http://devicetree.org/schemas/clock/
>>> qcom,qcs615-gcc.yaml#
>>
>> Taniya is looking at this one.
>
> Got it. Since the patch appears to be accepted, should I still wait for
> mm clk version 7?
> https://patchwork.kernel.org/project/linux-arm-msm/patch/20250814-
> qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com/
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: gpio@3e: $nodename:0:
>>> 'gpio@3e' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$'
>>> from schema $id: http://devicetree.org/schemas/pinctrl/
>>> semtech,sx1501q.yaml#
>>
>> This is from your patch.
>
> got it, will change "gpio@3e" to "pinctrl@3e"
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd10-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> got it, will add this part like https://lore.kernel.org/
> all/20250604071851.1438612-3-quic_amakhija@quicinc.com/
>
> @@ -51,6 +51,64 @@ dp_dsi0_connector_in: endpoint {
> };
> };
>
> + vreg_12p0: vreg-12p0-regulator {=
> ...
> @@ -338,7 +396,9 @@ bridge@58 {
> interrupts-extended = <&io_expander 0
> IRQ_TYPE_EDGE_FALLING>;
> enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
> reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
> - wakeup-source;
> + vdd10-supply = <&vreg_1p0>;
> + vdd18-supply = <&vreg_1p8>;
> + vdd33-supply = <&vreg_3p0>;
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd18-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> same as above
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'vdd33-supply'
>>> is a required property
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> same as above
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: bridge@58: 'wakeup-source'
>>> does not match any of the regexes: 'pinctrl-[0-9]+'
>>> from schema $id: http://devicetree.org/schemas/display/
>>> bridge/analogix,anx7625.yaml#
>>
>> This is from your patch.
>
> will remove it
>
>>
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dtb: phy@ae94400: Unevaluated
>>> properties are not allowed ('vdds-supply' was unexpected)
>>> from schema $id: http://devicetree.org/schemas/display/msm/
>>> dsi-phy-14nm.yaml#
>>
>> This is from your patch.
>
> will change "vdds-supply" to "vcca-supply"
>
>>
>>
>> Am I missing something? Is there any reason why these 6 new errors
>> should be added?
>
> Sorry, I missed those parts earlier. I've re-tested and confirmed the
> changes. The patch can pass after refine.
> Would it be appropriate to send v7 now, or should I wait until the mm
> clk v7 is ready?
ok, I saw it's already included in linux-next. I'll send v7 tomorrow
based on the latest linux-next. may i?
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=f9c36698db91780eed4ee3a90794bda2a4252166
>
>>
>> Regards,
>> Bjorn
>>
>>> ---
>>> arch/arm64/boot/dts/qcom/qcs615-ride.dts | 90 +++++++++++++++++++++
>>> +++++++++++
>>> 1 file changed, 90 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/
>>> boot/dts/qcom/qcs615-ride.dts
>>> index
>>> 59582d3dc4c49828ef4a0d22a1cbaba715c7ce8c..39c757b66f47579d9bc7cc5c4d703f7af4434df4 100644
>>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>>> @@ -39,6 +39,18 @@ xo_board_clk: xo-board-clk {
>>> };
>>> };
>>> + dp-dsi0-connector {
>>> + compatible = "dp-connector";
>>> + label = "DSI0";
>>> + type = "mini";
>>> +
>>> + port {
>>> + dp_dsi0_connector_in: endpoint {
>>> + remote-endpoint = <&dsi2dp_bridge_out>;
>>> + };
>>> + };
>>> + };
>>> +
>>> vreg_conn_1p8: regulator-conn-1p8 {
>>> compatible = "regulator-fixed";
>>> regulator-name = "vreg_conn_1p8";
>>> @@ -294,6 +306,84 @@ &gcc {
>>> <&sleep_clk>;
>>> };
>>> +&i2c2 {
>>> + clock-frequency = <400000>;
>>> + status = "okay";
>>> +
>>> + io_expander: gpio@3e {
>>> + compatible = "semtech,sx1509q";
>>> + reg = <0x3e>;
>>> + interrupts-extended = <&tlmm 58 IRQ_TYPE_EDGE_FALLING>;
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> + interrupt-controller;
>>> + #interrupt-cells = <2>;
>>> + semtech,probe-reset;
>>> + };
>>> +
>>> + i2c-mux@77 {
>>> + compatible = "nxp,pca9542";
>>> + reg = <0x77>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + i2c@0 {
>>> + reg = <0>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + bridge@58 {
>>> + compatible = "analogix,anx7625";
>>> + reg = <0x58>;
>>> + interrupts-extended = <&io_expander 0
>>> IRQ_TYPE_EDGE_FALLING>;
>>> + enable-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
>>> + reset-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
>>> + wakeup-source;
>>> +
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> +
>>> + dsi2dp_bridge_in: endpoint {
>>> + remote-endpoint = <&mdss_dsi0_out>;
>>> + };
>>> + };
>>> +
>>> + port@1 {
>>> + reg = <1>;
>>> +
>>> + dsi2dp_bridge_out: endpoint {
>>> + remote-endpoint = <&dp_dsi0_connector_in>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> + };
>>> +};
>>> +
>>> +&mdss {
>>> + status = "okay";
>>> +};
>>> +
>>> +&mdss_dsi0 {
>>> + vdda-supply = <&vreg_l11a>;
>>> + status = "okay";
>>> +};
>>> +
>>> +&mdss_dsi0_out {
>>> + remote-endpoint = <&dsi2dp_bridge_in>;
>>> + data-lanes = <0 1 2 3>;
>>> +};
>>> +
>>> +&mdss_dsi0_phy {
>>> + vdds-supply = <&vreg_l5a>;
>>> + status = "okay";
>>> +};
>>> +
>>> &pcie {
>>> perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
>>> wake-gpios = <&tlmm 100 GPIO_ACTIVE_HIGH>;
>>>
>>> --
>>> 2.34.1
>>>
>
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