[PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU

Aleksander Jan Bajkowski posted 3 patches 1 month, 2 weeks ago
[PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
Posted by Aleksander Jan Bajkowski 1 month, 2 weeks ago
The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
 1 file changed, 67 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml

diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
new file mode 100644
index 000000000000..fcbcd98def46
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
+
+maintainers:
+  - Aleksander Jan Bajkowski <olek2@wp.pl>
+
+description:
+  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
+  firmware needs these timers as a reference.
+
+properties:
+  $nodename:
+    pattern: "^gptu@[0-9a-f]+$"
+
+  compatible:
+    items:
+      - enum:
+          - lantiq,ase-gptu
+          - lantiq,danube-gptu
+          - lantiq,xrx100-gptu
+          - lantiq,xrx200-gptu
+      - const: lantiq,gptu-xway
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: timer1a interrupt
+      - description: timer1b interrupt
+      - description: timer2a interrupt
+      - description: timer2b interrupt
+      - description: timer3a interrupt
+      - description: timer3b interrupt
+
+  interrupt-names:
+    items:
+      - const: timer1a
+      - const: timer1b
+      - const: timer2a
+      - const: timer2b
+      - const: timer3a
+      - const: timer3b
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-names
+
+additionalProperties: false
+
+examples:
+  - |
+    gptu@e100a00 {
+        compatible = "lantiq,ase-gptu", "lantiq,gptu-xway";
+        reg = <0xe100a00 0x100>;
+        interrupt-parent = <&icu0>;
+        interrupts = <126>, <127>, <128>, <129> ,<130>, <131>;
+        interrupt-names = "timer1a", "timer1b", "timer2a", "timer2b",
+                "timer3a", "timer3b";
+    };
-- 
2.47.2
Re: [PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
Posted by Conor Dooley 1 month, 2 weeks ago
On Sat, Aug 16, 2025 at 03:16:22PM +0200, Aleksander Jan Bajkowski wrote:
> The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
>  .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> new file mode 100644
> index 000000000000..fcbcd98def46
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
> +
> +maintainers:
> +  - Aleksander Jan Bajkowski <olek2@wp.pl>
> +
> +description:
> +  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
> +  firmware needs these timers as a reference.
> +
> +properties:
> +  $nodename:
> +    pattern: "^gptu@[0-9a-f]+$"

This is a timer, why are you not using "timer" as the prefix?
Otherwise, this looks okay to me other than...

> +
> +  compatible:
> +    items:
> +      - enum:
> +          - lantiq,ase-gptu
> +          - lantiq,danube-gptu
> +          - lantiq,xrx100-gptu
> +          - lantiq,xrx200-gptu
> +      - const: lantiq,gptu-xway

..the fact that my OCD hates how the fallback inverts the position of
gptu in the compatible!
Re: [PATCH v2 1/3] dt-bindings: mips: lantiq: Document Lantiq Xway GPTU
Posted by Krzysztof Kozlowski 1 month, 2 weeks ago
On Mon, Aug 18, 2025 at 06:38:24PM +0100, Conor Dooley wrote:
> On Sat, Aug 16, 2025 at 03:16:22PM +0200, Aleksander Jan Bajkowski wrote:
> > The Lantiq SoC has six built-in 16-bit general purpose timers (GPTU).
> > 
> > Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> > ---
> >  .../mips/lantiq/lantiq,gptu-xway.yaml         | 67 +++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > new file mode 100644
> > index 000000000000..fcbcd98def46
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/mips/lantiq/lantiq,gptu-xway.yaml
> > @@ -0,0 +1,67 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,gptu-xway.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Lantiq Xway SoC series General Purpose Timer Unit (GPTU)
> > +
> > +maintainers:
> > +  - Aleksander Jan Bajkowski <olek2@wp.pl>
> > +
> > +description:
> > +  The Lantiq SoC has six built-in 16-bit general purpose timers. The voice
> > +  firmware needs these timers as a reference.
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "^gptu@[0-9a-f]+$"
> 
> This is a timer, why are you not using "timer" as the prefix?
> Otherwise, this looks okay to me other than...
> 
> > +
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - lantiq,ase-gptu
> > +          - lantiq,danube-gptu
> > +          - lantiq,xrx100-gptu
> > +          - lantiq,xrx200-gptu
> > +      - const: lantiq,gptu-xway
> 
> ..the fact that my OCD hates how the fallback inverts the position of
> gptu in the compatible!

Recommended naming is soc-subblock, so xway-gptu, but even more
recommended (and documented...) is to use only soc compatibles.

If xway is the soc, where is separate entry for that (maybe missing in
email context?).

Best regards,
Krzysztof