From: Mikhail Kalashnikov <iuncuim@gmail.com>
After adding the phy driver, we can also add phy node. In addition to the
clk and reset lines, the power domain PD_PCIE is declared in this node
according to the bsp dtb. So let's mention it.
Currently, phy driver does not support role selection and only works in
USB3.0 mode.
Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
index e4ed4fa82..233365496 100644
--- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
@@ -606,6 +606,16 @@ mdio0: mdio {
};
};
+ combophy: phy@4f00000 {
+ compatible = "allwinner,sun55i-a523-usb3-pcie-phy";
+ reg = <0x04f00000 0x100000>;
+ clocks = <&ccu CLK_USB3>;
+ resets = <&ccu RST_BUS_PCIE_USB3>;
+ #phy-cells = <0>;
+ power-domains = <&pck600 PD_PCIE>;
+ status = "disabled";
+ };
+
ppu: power-controller@7001400 {
compatible = "allwinner,sun55i-a523-ppu";
reg = <0x07001400 0x400>;
--
2.50.1On Sat, 16 Aug 2025 16:46:58 +0800
iuncuim <iuncuim@gmail.com> wrote:
Hi,
> From: Mikhail Kalashnikov <iuncuim@gmail.com>
>
> After adding the phy driver, we can also add phy node. In addition to the
> clk and reset lines, the power domain PD_PCIE is declared in this node
> according to the bsp dtb. So let's mention it.
> Currently, phy driver does not support role selection and only works in
> USB3.0 mode.
That's the current limitation of the proposed Linux driver, but should
not affect the binding or DT:
>
> Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
> ---
> arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index e4ed4fa82..233365496 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -606,6 +606,16 @@ mdio0: mdio {
> };
> };
>
> + combophy: phy@4f00000 {
> + compatible = "allwinner,sun55i-a523-usb3-pcie-phy";
> + reg = <0x04f00000 0x100000>;
> + clocks = <&ccu CLK_USB3>;
Will we need more clocks (or resets) when supporting PCIe later? If
yes, we should add them already now, even if they are not used by the
current driver.
> + resets = <&ccu RST_BUS_PCIE_USB3>;
> + #phy-cells = <0>;
I think we should use one PHY cell here, to allow users to select the
PHY path they need. A USB3.0-only driver implementation could choose to
ignore it, or require the number to be 0 only, rejecting anything else.
But this way we keep compatibility with newer DTs.
Cheers,
Andre
> + power-domains = <&pck600 PD_PCIE>;
> + status = "disabled";
> + };
> +
> ppu: power-controller@7001400 {
> compatible = "allwinner,sun55i-a523-ppu";
> reg = <0x07001400 0x400>;
On Sat, Aug 16, 2025 at 3:52 PM Andre Przywara <andre.przywara@arm.com> wrote:
>
> On Sat, 16 Aug 2025 16:46:58 +0800
> iuncuim <iuncuim@gmail.com> wrote:
>
> Hi,
>
> > From: Mikhail Kalashnikov <iuncuim@gmail.com>
> >
> > After adding the phy driver, we can also add phy node. In addition to the
> > clk and reset lines, the power domain PD_PCIE is declared in this node
> > according to the bsp dtb. So let's mention it.
> > Currently, phy driver does not support role selection and only works in
> > USB3.0 mode.
>
> That's the current limitation of the proposed Linux driver, but should
> not affect the binding or DT:
>
> >
> > Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com>
> > ---
> > arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> > index e4ed4fa82..233365496 100644
> > --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> > +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> > @@ -606,6 +606,16 @@ mdio0: mdio {
> > };
> > };
> >
> > + combophy: phy@4f00000 {
> > + compatible = "allwinner,sun55i-a523-usb3-pcie-phy";
> > + reg = <0x04f00000 0x100000>;
> > + clocks = <&ccu CLK_USB3>;
>
> Will we need more clocks (or resets) when supporting PCIe later? If
> yes, we should add them already now, even if they are not used by the
> current driver.
>
> > + resets = <&ccu RST_BUS_PCIE_USB3>;
> > + #phy-cells = <0>;
>
> I think we should use one PHY cell here, to allow users to select the
> PHY path they need. A USB3.0-only driver implementation could choose to
> ignore it, or require the number to be 0 only, rejecting anything else.
> But this way we keep compatibility with newer DTs.
Agreed. It seems this is the common case for combined PHYs. The last
cell tells which type of PHY is to be used.
ChenYu
> Cheers,
> Andre
>
> > + power-domains = <&pck600 PD_PCIE>;
> > + status = "disabled";
> > + };
> > +
> > ppu: power-controller@7001400 {
> > compatible = "allwinner,sun55i-a523-ppu";
> > reg = <0x07001400 0x400>;
>
On 16/08/2025 10:46, iuncuim wrote: > From: Mikhail Kalashnikov <iuncuim@gmail.com> > > After adding the phy driver, we can also add phy node. In addition to the > clk and reset lines, the power domain PD_PCIE is declared in this node > according to the bsp dtb. So let's mention it. > Currently, phy driver does not support role selection and only works in > USB3.0 mode. > > Signed-off-by: Mikhail Kalashnikov <iuncuim@gmail.com> > --- > arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) Please organize your patches correctly. One DTS was in the middle of patchset, other is at the end. They all must be at the end, because you cannot have dependency of driver on DTS. Best regards, Krzysztof
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