From: Aaron Kling <webgeek1234@gmail.com>

Existing code only sets cpu and gpu speedo ids 0 and 1. The cpu dvfs
code supports 11 ids and nouveau supports 5. This aligns with what the
downstream vendor kernel supports. Align the existing supported skus
with the downstream speedo list.

The Tegra210 CVB tables were added in the referenced fixes commit. Since
then, all Tegra210 socs have tried to scale to 1.9 GHz, when the
supported devkits are only supposed to scale to 1.5 or 1.7 GHZ.
Overclocking should not be the default state.

Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
---
 drivers/soc/tegra/fuse/speedo-tegra210.c | 31 ++++++++++++++++++++++++-------
 1 file changed, 24 insertions(+), 7 deletions(-)

diff --git a/drivers/soc/tegra/fuse/speedo-tegra210.c b/drivers/soc/tegra/fuse/speedo-tegra210.c
index 695d0b7f9a8abe53c497155603147420cda40b63..909fdf8fcc9d9f5ac936ae322e7a73dc720e5ab6 100644
--- a/drivers/soc/tegra/fuse/speedo-tegra210.c
+++ b/drivers/soc/tegra/fuse/speedo-tegra210.c
@@ -68,18 +68,35 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
 	switch (sku) {
 	case 0x00: /* Engineering SKU */
 	case 0x01: /* Engineering SKU */
+	case 0x13:
+		if (speedo_rev >= 2) {
+			sku_info->cpu_speedo_id = 5;
+			sku_info->gpu_speedo_id = 2;
+			break;
+		}
+
+		sku_info->gpu_speedo_id = 1;
+		break;
+
 	case 0x07:
 	case 0x17:
-	case 0x27:
-		if (speedo_rev >= 2)
-			sku_info->gpu_speedo_id = 1;
+		if (speedo_rev >= 2) {
+			sku_info->cpu_speedo_id = 7;
+			sku_info->gpu_speedo_id = 2;
+			break;
+		}
+
+		sku_info->gpu_speedo_id = 1;
 		break;
 
-	case 0x13:
-		if (speedo_rev >= 2)
-			sku_info->gpu_speedo_id = 1;
+	case 0x27:
+		if (speedo_rev >= 2) {
+			sku_info->cpu_speedo_id = 1;
+			sku_info->gpu_speedo_id = 2;
+			break;
+		}
 
-		sku_info->cpu_speedo_id = 1;
+		sku_info->gpu_speedo_id = 1;
 		break;
 
 	default:

-- 
2.50.1

On Saturday, August 16, 2025 2:53 PM Aaron Kling via B4 Relay wrote:
> From: Aaron Kling <webgeek1234@gmail.com>
> 
> Existing code only sets cpu and gpu speedo ids 0 and 1. The cpu dvfs
> code supports 11 ids and nouveau supports 5. This aligns with what the
> downstream vendor kernel supports. Align the existing supported skus
> with the downstream speedo list.
> 
> The Tegra210 CVB tables were added in the referenced fixes commit. Since
> then, all Tegra210 socs have tried to scale to 1.9 GHz, when the
> supported devkits are only supposed to scale to 1.5 or 1.7 GHZ.
> Overclocking should not be the default state.
> 
> Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210")
> Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
> ---
>  drivers/soc/tegra/fuse/speedo-tegra210.c | 31 ++++++++++++++++++++++++-------
>  1 file changed, 24 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/soc/tegra/fuse/speedo-tegra210.c b/drivers/soc/tegra/fuse/speedo-tegra210.c
> index 695d0b7f9a8abe53c497155603147420cda40b63..909fdf8fcc9d9f5ac936ae322e7a73dc720e5ab6 100644
> --- a/drivers/soc/tegra/fuse/speedo-tegra210.c
> +++ b/drivers/soc/tegra/fuse/speedo-tegra210.c
> @@ -68,18 +68,35 @@ static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
>  	switch (sku) {
>  	case 0x00: /* Engineering SKU */
>  	case 0x01: /* Engineering SKU */
> +	case 0x13:
> +		if (speedo_rev >= 2) {
> +			sku_info->cpu_speedo_id = 5;
> +			sku_info->gpu_speedo_id = 2;
> +			break;
> +		}
> +
> +		sku_info->gpu_speedo_id = 1;
> +		break;
> +
>  	case 0x07:
>  	case 0x17:
> -	case 0x27:
> -		if (speedo_rev >= 2)
> -			sku_info->gpu_speedo_id = 1;
> +		if (speedo_rev >= 2) {
> +			sku_info->cpu_speedo_id = 7;
> +			sku_info->gpu_speedo_id = 2;
> +			break;
> +		}
> +
> +		sku_info->gpu_speedo_id = 1;
>  		break;
>  
> -	case 0x13:
> -		if (speedo_rev >= 2)
> -			sku_info->gpu_speedo_id = 1;
> +	case 0x27:
> +		if (speedo_rev >= 2) {
> +			sku_info->cpu_speedo_id = 1;
> +			sku_info->gpu_speedo_id = 2;
> +			break;
> +		}
>  
> -		sku_info->cpu_speedo_id = 1;
> +		sku_info->gpu_speedo_id = 1;
>  		break;
>  
>  	default:
> 
> 

This is getting unwieldy, so I think it'd be a good idea to restructure this to be more readable. Revision 1 chips are simple, so perhaps handle them separately -- something like ..

if speedo_rev >= 2 {
	switch (sku) {
	...
	}
} else if (sku == 0x00 || sku == 0x01 || sku == 0x07 || sku == 0x13 || sku == 0x17) {
	gpu_speedo_id = 1;
} else {
	print error 
}

We can also add rest of SKUs from downstream. By my count, this patch is missing:

	0x1F (same as 0x07, 0x17)
	0x83 (cpu=3, gpu=3)
	0x87 (cpu=2, gpu=1)

(all speedo_rev >= 2). Plus the 0x8F you're adding in the next patch. I think that can be merged into this patch as well.

Thanks!
Mikko