[PATCH 04/13] arm64: dts: imx95: Add more V2X MUs

Peng Fan posted 13 patches 1 month, 2 weeks ago
There is a newer version of this series
[PATCH 04/13] arm64: dts: imx95: Add more V2X MUs
Posted by Peng Fan 1 month, 2 weeks ago
Add more MUs for V2X communication

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx95.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index e20feb1bcec6088949e7dd1ab2fc1c108393fb81..02c0422a7aa3877c8431c9b050d85f43f5ed7bde 100644
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -1500,6 +1500,13 @@ mu6: mailbox@44630000 {
 			};
 		};
 
+		mailbox@47300000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47300000 0x0 0x10000>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		mailbox@47320000 {
 			compatible = "fsl,imx95-mu-v2x";
 			reg = <0x0 0x47320000 0x0 0x10000>;
@@ -1507,6 +1514,20 @@ mailbox@47320000 {
 			#mbox-cells = <2>;
 		};
 
+		mailbox@47330000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47330000 0x0 0x10000>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
+		mailbox@47340000 {
+			compatible = "fsl,imx95-mu-v2x";
+			reg = <0x0 0x47340000 0x0 0x10000>;
+			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+			#mbox-cells = <2>;
+		};
+
 		mailbox@47350000 {
 			compatible = "fsl,imx95-mu-v2x";
 			reg = <0x0 0x47350000 0x0 0x10000>;

-- 
2.37.1
Re: [PATCH 04/13] arm64: dts: imx95: Add more V2X MUs
Posted by Frank Li 1 month, 2 weeks ago
On Fri, Aug 15, 2025 at 05:03:50PM +0800, Peng Fan wrote:
> Add more MUs for V2X communication
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index e20feb1bcec6088949e7dd1ab2fc1c108393fb81..02c0422a7aa3877c8431c9b050d85f43f5ed7bde 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1500,6 +1500,13 @@ mu6: mailbox@44630000 {
>  			};
>  		};
>
> +		mailbox@47300000 {
> +			compatible = "fsl,imx95-mu-v2x";
> +			reg = <0x0 0x47300000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <2>;
> +		};
> +
>  		mailbox@47320000 {
>  			compatible = "fsl,imx95-mu-v2x";
>  			reg = <0x0 0x47320000 0x0 0x10000>;
> @@ -1507,6 +1514,20 @@ mailbox@47320000 {
>  			#mbox-cells = <2>;
>  		};
>
> +		mailbox@47330000 {
> +			compatible = "fsl,imx95-mu-v2x";
> +			reg = <0x0 0x47330000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <2>;
> +		};
> +
> +		mailbox@47340000 {
> +			compatible = "fsl,imx95-mu-v2x";
> +			reg = <0x0 0x47340000 0x0 0x10000>;
> +			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> +			#mbox-cells = <2>;
> +		};
> +
>  		mailbox@47350000 {
>  			compatible = "fsl,imx95-mu-v2x";
>  			reg = <0x0 0x47350000 0x0 0x10000>;
>
> --
> 2.37.1
>