drivers/platform/x86/intel/pmc/core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Updated ARL_PMT_DMU_GUID value. Arrow Lake PMT DMU GUID has
been updated after it was released. This updates ensures that
the die c6 value is available in the debug filesystem.
Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver")
Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
---
drivers/platform/x86/intel/pmc/core.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index 4a94a4ee031e6..24139617eef61 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -282,7 +282,7 @@ enum ppfear_regs {
/* Die C6 from PUNIT telemetry */
#define MTL_PMT_DMU_DIE_C6_OFFSET 15
#define MTL_PMT_DMU_GUID 0x1A067102
-#define ARL_PMT_DMU_GUID 0x1A06A000
+#define ARL_PMT_DMU_GUID 0x1A06A102
#define LNL_PMC_MMIO_REG_LEN 0x2708
#define LNL_PMC_LTR_OSSE 0x1B88
--
2.43.0
Thanks Xi On Thu, Aug 14, 2025, at 3:51 PM, Xi Pardee wrote: > Updated ARL_PMT_DMU_GUID value. Arrow Lake PMT DMU GUID has > been updated after it was released. This updates ensures that > the die c6 value is available in the debug filesystem. > > Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support > to intel_pmc_core driver") > Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> > --- > drivers/platform/x86/intel/pmc/core.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/platform/x86/intel/pmc/core.h > b/drivers/platform/x86/intel/pmc/core.h > index 4a94a4ee031e6..24139617eef61 100644 > --- a/drivers/platform/x86/intel/pmc/core.h > +++ b/drivers/platform/x86/intel/pmc/core.h > @@ -282,7 +282,7 @@ enum ppfear_regs { > /* Die C6 from PUNIT telemetry */ > #define MTL_PMT_DMU_DIE_C6_OFFSET 15 > #define MTL_PMT_DMU_GUID 0x1A067102 > -#define ARL_PMT_DMU_GUID 0x1A06A000 > +#define ARL_PMT_DMU_GUID 0x1A06A102 > > #define LNL_PMC_MMIO_REG_LEN 0x2708 > #define LNL_PMC_LTR_OSSE 0x1B88 > -- > 2.43.0 Tested this on my Lenovo P1 G8 and confirmed that it fixed the error message that was seen previously. Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> Mark
Hi Xi, On Mon, Aug 18, 2025 at 11:40:47AM -0400, Mark Pearson wrote: > Thanks Xi > > On Thu, Aug 14, 2025, at 3:51 PM, Xi Pardee wrote: > > Updated ARL_PMT_DMU_GUID value. Arrow Lake PMT DMU GUID has > > been updated after it was released. This updates ensures that > > the die c6 value is available in the debug filesystem. > > > > Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support > > to intel_pmc_core driver") > > Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> > > --- > > drivers/platform/x86/intel/pmc/core.h | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/platform/x86/intel/pmc/core.h > > b/drivers/platform/x86/intel/pmc/core.h > > index 4a94a4ee031e6..24139617eef61 100644 > > --- a/drivers/platform/x86/intel/pmc/core.h > > +++ b/drivers/platform/x86/intel/pmc/core.h > > @@ -282,7 +282,7 @@ enum ppfear_regs { > > /* Die C6 from PUNIT telemetry */ > > #define MTL_PMT_DMU_DIE_C6_OFFSET 15 > > #define MTL_PMT_DMU_GUID 0x1A067102 > > -#define ARL_PMT_DMU_GUID 0x1A06A000 > > +#define ARL_PMT_DMU_GUID 0x1A06A102 > > > > #define LNL_PMC_MMIO_REG_LEN 0x2708 > > #define LNL_PMC_LTR_OSSE 0x1B88 > > -- > > 2.43.0 > > Tested this on my Lenovo P1 G8 and confirmed that it fixed the error message that was seen previously. > > Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> If you send another version, please tag with a link to the bugzilla, https://bugzilla.kernel.org/show_bug.cgi?id=220421 Thanks David
Hi David, On 8/19/2025 12:41 PM, David Box wrote: > Hi Xi, > > On Mon, Aug 18, 2025 at 11:40:47AM -0400, Mark Pearson wrote: >> Thanks Xi >> >> On Thu, Aug 14, 2025, at 3:51 PM, Xi Pardee wrote: >>> Updated ARL_PMT_DMU_GUID value. Arrow Lake PMT DMU GUID has >>> been updated after it was released. This updates ensures that >>> the die c6 value is available in the debug filesystem. >>> >>> Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support >>> to intel_pmc_core driver") >>> Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> >>> --- >>> drivers/platform/x86/intel/pmc/core.h | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/platform/x86/intel/pmc/core.h >>> b/drivers/platform/x86/intel/pmc/core.h >>> index 4a94a4ee031e6..24139617eef61 100644 >>> --- a/drivers/platform/x86/intel/pmc/core.h >>> +++ b/drivers/platform/x86/intel/pmc/core.h >>> @@ -282,7 +282,7 @@ enum ppfear_regs { >>> /* Die C6 from PUNIT telemetry */ >>> #define MTL_PMT_DMU_DIE_C6_OFFSET 15 >>> #define MTL_PMT_DMU_GUID 0x1A067102 >>> -#define ARL_PMT_DMU_GUID 0x1A06A000 >>> +#define ARL_PMT_DMU_GUID 0x1A06A102 >>> >>> #define LNL_PMC_MMIO_REG_LEN 0x2708 >>> #define LNL_PMC_LTR_OSSE 0x1B88 >>> -- >>> 2.43.0 >> Tested this on my Lenovo P1 G8 and confirmed that it fixed the error message that was seen previously. >> >> Tested-by: Mark Pearson <mpearson-lenovo@squebb.ca> > If you send another version, please tag with a link to the bugzilla, > https://bugzilla.kernel.org/show_bug.cgi?id=220421 > > Thanks > > David Will add the bugzilla link in next version. Thanks! Xi
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